Patents by Inventor Cho-Hsin Chang

Cho-Hsin Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11527472
    Abstract: A supporting structure is provided, which forms a protective layer on a metal member having a plurality of conductive posts, and the protective layer is exposed from end surfaces of the conductive posts, such that conductors are formed on the end surfaces of the conductive posts, thereby avoiding damage of the protective layer.
    Type: Grant
    Filed: May 6, 2020
    Date of Patent: December 13, 2022
    Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Cho-Hsin Chang, Hao-Ju Fang, Ting-Wei Chi, Te-Fang Chu
  • Publication number: 20210305148
    Abstract: A supporting structure is provided, which forms a protective layer on a metal member having a plurality of conductive posts, and the protective layer is exposed from end surfaces of the conductive posts, such that conductors are formed on the end surfaces of the conductive posts, thereby avoiding damage of the protective layer.
    Type: Application
    Filed: May 6, 2020
    Publication date: September 30, 2021
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Cho-Hsin Chang, Hao-Ju Fang, Ting-Wei Chi, Te-Fang Chu
  • Patent number: 10074613
    Abstract: A semiconductor package is provided, including: a substrate having opposing first and second surfaces; a plurality of semiconductor components disposed on and electrically connected to the first surface; an encapsulant encapsulating the first surface and the semiconductor components and having at least one first groove that partitions the substrate into a plurality of package units, each of which has at least one of the semiconductor components; and a metal layer formed on the substrate and the encapsulant and encapsulating a periphery of the package units, with the second surface exposed from the metal layer, wherein the metal layer is formed along a wall surface of the first groove, to form a second groove corresponding in position to the first groove and having a metal surface. Therefore, the package units are isolated and form a multilayer isolated structure, including metal layers and air layers, and are electromagnetically shielded from one another.
    Type: Grant
    Filed: May 2, 2017
    Date of Patent: September 11, 2018
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chih-Hsien Chiu, Hao-Ju Fang, Hsin-Lung Chung, Cho-Hsin Chang, Tsung-Hsien Tsai, Chia-Yang Chen, Chun-Chi Ke
  • Patent number: 9899335
    Abstract: A package structure includes a carrier, an electronic component disposed on the carrier, an encapsulant formed on the carrier for encapsulating the electronic component, a first shielding layer formed on the encapsulant, and a second shielding layer formed on the first shielding layer. The first and second shielding layers are made of different materials. With the multiple shielding layers formed on the encapsulating layer, the electronic component is protected from electromagnetic interferences. The present invention also provides a method for fabricating the package structure.
    Type: Grant
    Filed: October 20, 2016
    Date of Patent: February 20, 2018
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chih-Hsien Chiu, Hsin-Lung Chung, Cho-Hsin Chang, Chia-Yang Chen, Chao-Ya Yang
  • Publication number: 20170236787
    Abstract: A semiconductor package is provided, including: a substrate having opposing first and second surfaces; a plurality of semiconductor components disposed on and electrically connected to the first surface; an encapsulant encapsulating the first surface and the semiconductor components and having at least one first groove that partitions the substrate into a plurality of package units, each of which has at least one of the semiconductor components; and a metal layer formed on the substrate and the encapsulant and encapsulating a periphery of the package units, with the second surface exposed from the metal layer, wherein the metal layer is formed along a wall surface of the first groove, to form a second groove corresponding in position to the first groove and having a metal surface. Therefore, the package units are isolated and form a multilayer isolated structure, including metal layers and air layers, and are electromagnetically shielded from one another.
    Type: Application
    Filed: May 2, 2017
    Publication date: August 17, 2017
    Inventors: Chih-Hsien Chiu, Hao-Ju Fang, Hsin-Lung Chung, Cho-Hsin Chang, Tsung-Hsien Tsai, Chia-Yang Chen, Chun-Chi Ke
  • Patent number: 9673151
    Abstract: A semiconductor package is provided, including: a substrate having opposing first and second surfaces; a plurality of semiconductor components disposed on and electrically connected to the first surface; an encapsulant encapsulating the first surface and the semiconductor components and having at least one first groove that partitions the substrate into a plurality of package units, each of which has at least one of the semiconductor components; and a metal layer formed on the substrate and the encapsulant and encapsulating a periphery of the package units, with the second surface exposed from the metal layer, wherein the metal layer is formed along a wall surface of the first groove, to form a second groove corresponding in position to the first groove and having a metal surface. Therefore, the package units are isolated and form a multilayer isolated structure, including metal layers and air layers, and are electromagnetically shielded from one another.
    Type: Grant
    Filed: August 27, 2015
    Date of Patent: June 6, 2017
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chih-Hsien Chiu, Hao-Ju Fang, Hsin-Lung Chung, Cho-Hsin Chang, Tsung-Hsien Tsai, Chia-Yang Chen, Chun-Chi Ke
  • Publication number: 20170103953
    Abstract: A package structure includes a carrier, an electronic component disposed on the carrier, an encapsulant formed on the carrier for encapsulating the electronic component, a first shielding layer formed on the encapsulant, and a second shielding layer formed on the first shielding layer. The first and second shielding layers are made of different materials. With the multiple shielding layers formed on the encapsulating layer, the electronic component is protected from electromagnetic interferences. The present invention also provides a method for fabricating the package structure.
    Type: Application
    Filed: October 20, 2016
    Publication date: April 13, 2017
    Inventors: Chih-Hsien Chiu, Hsin-Lung Chung, Cho-Hsin Chang, Chia-Yang Chen, Chao-Ya Yang
  • Patent number: 9508656
    Abstract: A package structure includes a carrier, an electronic component disposed on the carrier, an encapsulant formed on the carrier for encapsulating the electronic component, a first shielding layer formed on the encapsulant, and a second shielding layer formed on the first shielding layer. The first and second shielding layers are made of different materials. With the multiple shielding layers formed on the encapsulating layer, the electronic component is protected from electromagnetic interferences. The present invention also provides a method for fabricating the package structure.
    Type: Grant
    Filed: August 20, 2014
    Date of Patent: November 29, 2016
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chih-Hsien Chiu, Hsin-Lung Chung, Cho-Hsin Chang, Chia-Yang Chen, Chao-Ya Yang
  • Patent number: 9490219
    Abstract: This invention provides a semiconductor package, including a substrate, a plurality of semiconductor elements disposed on the substrate, at least one shielding member disposed between at least two of the semiconductor elements, and an encapsulant encapsulating the semiconductor elements and shielding members. Through the shielding member, electromagnetic interference caused among semiconductor elements can be prevented.
    Type: Grant
    Filed: August 14, 2014
    Date of Patent: November 8, 2016
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Cho-Hsin Chang, Tsung-Hsien Hsu, Hsin-Lung Chung, Te-Fang Chu, Chia-Yang Chen
  • Publication number: 20160093576
    Abstract: A semiconductor package is provided, including: a substrate having opposing first and second surfaces; a plurality of semiconductor components disposed on and electrically connected to the first surface; an encapsulant encapsulating the first surface and the semiconductor components and having at least one first groove that partitions the substrate into a plurality of package units, each of which has at least one of the semiconductor components; and a metal layer formed on the substrate and the encapsulant and encapsulating a periphery of the package units, with the second surface exposed from the metal layer, wherein the metal layer is formed along a wall surface of the first groove, to form a second groove corresponding in position to the first groove and having a metal surface. Therefore, the package units are isolated and form a multilayer isolated structure, including metal layers and air layers, and are electromagnetically shielded from one another.
    Type: Application
    Filed: August 27, 2015
    Publication date: March 31, 2016
    Inventors: Chih-Hsien Chiu, Hao-Ju Fang, Hsin-Lung Chung, Cho-Hsin Chang, Tsung-Hsien Tsai, Chia-Yang Chen, Chun-Chi Ke
  • Publication number: 20160027740
    Abstract: A package structure includes a carrier, an electronic component disposed on the carrier, an encapsulant formed on the carrier for encapsulating the electronic component, a first shielding layer formed on the encapsulant, and a second shielding layer formed on the first shielding layer. The first and second shielding layers are made of different materials. With the multiple shielding layers formed on the encapsulating layer, the electronic component is protected from electromagnetic interferences. The present invention also provides a method for fabricating the package structure.
    Type: Application
    Filed: August 20, 2014
    Publication date: January 28, 2016
    Inventors: Chih-Hsien Chiu, Hsin-Lung Chung, Cho-Hsin Chang, Chia-Yang Chen, Chao-Ya Yang
  • Publication number: 20150333017
    Abstract: This invention provides a semiconductor package, including a substrate, a plurality of semiconductor elements disposed on the substrate, at least one shielding member disposed between at least two of the semiconductor elements, and an encapsulant encapsulating the semiconductor elements and shielding members. Through the shielding member, electromagnetic interference caused among semiconductor elements can be prevented.
    Type: Application
    Filed: August 14, 2014
    Publication date: November 19, 2015
    Inventors: Cho-Hsin Chang, Tsung-Hsien Hsu, Hsin-Lung Chung, Te-Fang Chu, Chia-Yang Chen
  • Publication number: 20120235259
    Abstract: A semiconductor package and a method of fabricating the same. The semiconductor package includes: a substrate having a plurality of semiconductor components disposed thereon; an encapsulant covering the substrate and the semiconductor components; and a metal layer formed on the exposed surfaces of the encapsulant, wherein the encapsulant is formed with a trench for dividing into a plurality of package units on the substrate to allow each of the package units to have at least one of the semiconductor components, and the metal layer is formed in the trench to encompass the encapsulant on the periphery of the semiconductor components, thereby preventing interference of electromagnetic waves between the semiconductor components.
    Type: Application
    Filed: September 23, 2011
    Publication date: September 20, 2012
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Hao-Ju Fang, Hsin-Lung Chung, Cho-Hsin Chang, Tsung-Hsien Tsai
  • Patent number: 7655540
    Abstract: A method and jig structure for positioning bare dice is disclosed. The jig structure for positioning at least one bare dice includes a trap having at least one positioning groove wherein the depth of the positioning groove is less than the height of the bare dice. Basing on the positioning groove formed in the tray, once a bare dice is placed in the positioning groove, the partially exposed bare dice can be located directly and precisely vacuum-grabbed by a sucker, so that the number of positioning steps is reduced.
    Type: Grant
    Filed: March 21, 2008
    Date of Patent: February 2, 2010
    Assignee: Universal Scientific Industrial Co., Ltd.
    Inventor: Cho-Hsin Chang
  • Publication number: 20090239317
    Abstract: A method and jig structure for positioning bare dice is disclosed. The jig structure for positioning at least one bare dice includes a trap having at least one positioning groove wherein the depth of the positioning groove is less than the height of the bare dice. Basing on the positioning groove formed in the tray, once a bare dice is placed in the positioning groove, the partially exposed bare dice can be located directly and precisely vacuum-grabbed by a sucker, so that the number of positioning steps is reduced.
    Type: Application
    Filed: March 21, 2008
    Publication date: September 24, 2009
    Inventor: Cho-Hsin Chang