Abstract: A semiconductor memory storage array device comprises a first electrode layer, an oxide layer, a second electrode layer, a memory material layer and a first insulator layer. The oxide layer is disposed on the first electrode layer. The second electrode layer is disposed on the oxide layer. The memory material layer is disposed on the second electrode layer. The first insulator layer is disposed adjacent to two sidewalls of the first electrode layer, the oxide layer, the second electrode layer and the memory material layer, so to define a gap either between the first electrode layer and the oxide layer or between the second electrode layer and the oxide layer.

Abstract: The present invention discloses a resistive memory structure and a method for fabricating the same. The memory structure comprises a plurality of memory cells. Each memory cell further comprises two separate upper sub-electrodes fabricated from an upper electrode, two separate lower sub-electrodes fabricated from a lower electrode and intersecting the upper sub-electrodes, and a resistive layer arranged between the upper sub-electrodes and the lower sub-electrodes. Thereby, four sub-memory cells are formed in the intersections of the two upper sub-electrodes, the two lower sub-electrodes, and the resistive layer. Thus is increased the density of a memory structure in an identical area.

Abstract: A semiconductor memory storage array device comprises a first electrode layer, an oxide layer, a second electrode layer, a memory material layer and a first insulator layer. The oxide layer is disposed on the first electrode layer. The second electrode layer is disposed on the oxide layer. The memory material layer is disposed on the second electrode layer. The first insulator layer is disposed adjacent to two sidewalls of the first electrode layer, the oxide layer, the second electrode layer and the memory material layer, so to define a gap either between the first electrode layer and the oxide layer or between the second electrode layer and the oxide layer.

Abstract: The present invention discloses an ultra high density resistive memory structure and a method for fabricating the same. The memory structure comprises a plurality of memory cells. Each memory cell further comprises two separate upper sub-electrodes fabricated from an upper electrode, two separate lower sub-electrodes fabricated from a lower electrode and intersecting the upper sub-electrodes, and a resistive layer arranged between the upper sub-electrodes and the lower sub-electrodes. Thereby, four sub-memory cells are formed in the intersections of the two upper sub-electrodes, the two lower sub-electrodes, and the resistive layer. Thus is increased the density of a memory structure in an identical area.