Patents by Inventor Choi Pheng Soo

Choi Pheng Soo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6323125
    Abstract: Only one photo mask defines the metal trench and via region. The mask blocks the UV light in the trench and via area forming Plasma Polymerized Methylsilane Oxide (PPMSO) in the exposed areas. Two step RIE plasma treatment using chlorine gas and oxygen gas removes the Plasma Polymerized Methylsilane (PPMS) in the trench and via regions. Conductive metal is deposited. A CMP process polishes back both excess metal along with the PPMSO, at a similar rate, to form: conducting metal lines, interconnects, and via contacts without metal dishing.
    Type: Grant
    Filed: March 29, 1999
    Date of Patent: November 27, 2001
    Assignees: Chartered Semiconductor Manufacturing Ltd, National University of Singapore, Nahyang Technological University of Singapore
    Inventors: Choi Pheng Soo, Wye Boon Loh, Lap Chan
  • Patent number: 6251798
    Abstract: A method for the formation of an air gap structure for use in inter-metal applications. A metal pattern of metal lines is formed, a layer of Plasma Polymerized Methylsilane (PPMS) resist is deposited on top of this pattern. The surface of the PPMS resist is subjected to selective exposure. The unexposed PPMS is removed after which the process is completed by closing up the openings within the PPMS.
    Type: Grant
    Filed: July 26, 1999
    Date of Patent: June 26, 2001
    Assignees: Chartered Semiconductor Manufacturing Company, National University of Singapore, Nanyang Technological University of Singapore
    Inventors: Choi Pheng Soo, Kheng Chok Tee, Kok Keng Ong, Lap Chan
  • Patent number: 6221560
    Abstract: A new method for planarizing silicon dioxide surfaces in semiconductor structures. Starting with a structure of an underlying layer (for instance a layer of metal lines) a layer of oxide is deposited and profiled by positive tone imaging. A layer of PPMS is deposited. Using the mask of the starting structure, the PPMS layer is exposed changing the PPMS to PPMSO in the exposed regions. The unexposed PPMS is removed, the PPMSO (unexposed regions of the PPMS) are planarized, this planarization can proceed to the point where no more PPMSO is present (the PPMSO “columns” are removed together with the intra-layer of patterned oxide). The surface thus created shows excellent planarity, this surface can be further planarized down to the top level of the underlying pattern, if it is desirable to do so.
    Type: Grant
    Filed: August 12, 1999
    Date of Patent: April 24, 2001
    Assignees: Chartered Semiconductor Manufacturing Ltd., National University of Singapore
    Inventors: Choi Pheng Soo, Lap Chan