Abstract: A display device includes: active stages each include a scan output circuit outputting a scan clock signal to a first output terminal and a carry output circuit outputting a carry clock signal to a second output terminal, when a voltage of a first node is at a logic high level. The scan output circuit and carry output circuit output a scan signal of a turn-off level to the first output terminal when a voltage of a second node or a carry signal is at a logic high level. An interval between pulses of the carry clock signal generated during one frame period is the same, and at least two of intervals between pulses of the scan clock signal generated during the one frame period are different from each other.

Abstract: A pixel includes a first transistor generating current from a first power source line to a second power source line through a light-emitting element, a second transistor between a third power source line and a gate electrode of the first transistor, a third transistor between a data line and a gate electrode of the second transistor and controlled by a first signal, a fourth transistor between a fourth power source line and a first node and controlled by a second signal, a first capacitor between the gate electrode of the first transistor and the first node, and a second capacitor between the gate electrode of the second transistor and a sweep voltage line providing a sweep voltage that linearly changes from a first voltage level to a second voltage level, and nonlinearly changes from the second voltage level to a third voltage level when the third transistor is on.

Abstract: A pixel includes a first transistor generating current from a first power source line to a second power source line through a light-emitting element, a second transistor between a third power source line and a gate electrode of the first transistor, a third transistor between a data line and a gate electrode of the second transistor and controlled by a first signal, a fourth transistor between a fourth power source line and a first node and controlled by a second signal, a first capacitor between the gate electrode of the first transistor and the first node, and a second capacitor between the gate electrode of the second transistor and a sweep voltage line providing a sweep voltage that linearly changes from a first voltage level to a second voltage level, and nonlinearly changes from the second voltage level to a third voltage level when the third transistor is on.

Abstract: A display device includes: active stages each include a scan output circuit outputting a scan clock signal to a first output terminal and a carry output circuit outputting a carry clock signal to a second output terminal, when a voltage of a first node is at a logic high level. The scan output circuit and carry output circuit output a scan signal of a turn-off level to the first output terminal when a voltage of a second node or a carry signal is at a logic high level. An interval between pulses of the carry clock signal generated during one frame period is the same, and at least two of intervals between pulses of the scan clock signal generated during the one frame period are different from each other.

Abstract: A display device includes: active stages each include a scan output circuit outputting a scan clock signal to a first output terminal and a carry output circuit outputting a carry clock signal to a second output terminal, when a voltage of a first node is at a logic high level. The scan output circuit and carry output circuit output a scan signal of a turn-off level to the first output terminal when a voltage of a second node or a carry signal is at a logic high level. An interval between pulses of the carry clock signal generated during one frame period is the same, and at least two of intervals between pulses of the scan clock signal generated during the one frame period are different from each other.

Abstract: A display device includes: active stages each include a scan output circuit outputting a scan clock signal to a first output terminal and a carry output circuit outputting a carry clock signal to a second output terminal, when a voltage of a first node is at a logic high level. The scan output circuit and carry output circuit output a scan signal of a turn-off level to the first output terminal when a voltage of a second node or a carry signal is at a logic high level. An interval between pulses of the carry clock signal generated during one frame period is the same, and at least two of intervals between pulses of the scan clock signal generated during the one frame period are different from each other.

Abstract: A display device comprises a display area, a non-display area surrounding the display area, pixels disposed in the display area of the substrate, each of the pixels including a first electrode, a second electrode, and light-emitting elements electrically connected to the first electrode and the second electrode, and a first voltage wiring disposed in the display area and the non-display area, the first voltage wiring electrically connected to at least some of the pixels. The first voltage wiring includes a first separation wiring disposed in the non-display area, and a second separation wiring disposed in the non-display area and spaced apart from the first separation wiring.

Abstract: A display device includes: a substrate including a display region including a plurality of pixel regions, and a non-display region at a periphery of the display region; a pixel circuit layer including a plurality of circuit elements in the display region; a display element layer including a plurality of light emitting devices in the display region on the pixel circuit layer; and first and second alignment lines in the non-display region, the first and second alignment lines each having a multi-layered structure. Each of the first and second alignment lines includes: a main line in a same layer as at least one electrode in the display element layer; and at least one sub-line electrically connected to the main line, the at least one sub-line in a same layer as at least one electrode in the pixel circuit layer.

Abstract: Provided are a charge equalization apparatus for a battery string. According to the exemplary embodiments of the present invention, the charge equalization apparatus are modularized by being divided into the master unit and the slave unit, such that the charge equalization apparatus may be expanded and contracted independent of the number of batteries, the circuits are separated for each module, such that the circuits may be easily implemented, and when the circuits are damaged, only the damaged module is replaced, such that the effective countermeasure may be performed.

Abstract: A display device includes: a substrate including a display region including a plurality of pixel regions, and a non-display region at a periphery of the display region; a pixel circuit layer including a plurality of circuit elements in the display region; a display element layer including a plurality of light emitting devices in the display region on the pixel circuit layer; and first and second alignment lines in the non-display region, the first and second alignment lines each having a multi-layered structure. Each of the first and second alignment lines includes: a main line in a same layer as at least one electrode in the display element layer; and at least one sub-line electrically connected to the main line, the at least one sub-line in a same layer as at least one electrode in the pixel circuit layer.

Abstract: An organic light-emitting display device and a method of driving the same. The organic light-emitting display device is driven, with one frame being divided into a first period, a second period, a third period, and a fourth period, and includes pixels coupled to scan lines and data lines, a first power supply configured to supply first driving power, wherein the first driving power is set to a first voltage during the first period and the fourth period and a second voltage lower than the first voltage during the second period and the third period, a second power supply configured to supply second driving power. The second driving power is set to a third voltage during the first to third periods and to a fourth voltage lower than the third voltage during the fourth period.

Abstract: Provided are a battery state-of-charge (SOC) estimation method and a battery management system which are capable of estimating an SOC using an inexpensive processor and a small-capacity memory. The SOC estimation method includes an SOC table creation step, an SOC calculation step, an SOC comparison step, and a processing step. The battery management system includes a battery, a sensing resistor, a control switch unit, and a processor.

Abstract: A liquid crystal display device includes a substrate, a first coupling electrode disposed on the substrate, a first insulating layer disposed on the first coupling electrode, a second coupling electrode disposed on the first insulating layer and capacitively coupled to the first coupling electrode, a second insulating layer disposed on the second coupling electrode, and a pixel electrode including first and second sub-pixel electrodes, which are disposed on the second insulating layer and are electrically insulated from each other, where the first sub-pixel electrode is electrically connected to the first coupling electrode via a first contact hole, which is defined in the first and second insulating layers, and the second sub-pixel electrode is electrically connected to the second coupling electrode via a second contact hole which is defined in the second insulating layer.

Abstract: A liquid crystal display device includes a substrate, a first coupling electrode disposed on the substrate, a first insulating layer disposed on the first coupling electrode, a second coupling electrode disposed on the first insulating layer and capacitively coupled to the first coupling electrode, a second insulating layer disposed on the second coupling electrode, and a pixel electrode including first and second sub-pixel electrodes, which are disposed on the second insulating layer and are electrically insulated from each other, where the first sub-pixel electrode is electrically connected to the first coupling electrode via a first contact hole, which is defined in the first and second insulating layers, and the second sub-pixel electrode is electrically connected to the second coupling electrode via a second contact hole which is defined in the second insulating layer.

Abstract: Provided are a charge equalization apparatus for a battery string. According to the exemplary embodiments of the present invention, the charge equalization apparatus are modularized by being divided into the master unit and the slave unit, such that the charge equalization apparatus may be expanded and contracted independent of the number of batteries, the circuits are separated for each module, such that the circuits may be easily implemented, and when the circuits are damaged, only the damaged module is replaced, such that the effective countermeasure may be performed.

Abstract: Introduced are a cell balancing integrated circuit which may be realized including a small number of switches or diodes, an energy non-consumption type cell balancing system including the cell balancing integrated circuit, and an energy non-consumption type cell balancing method. The energy non-consumption type cell balancing system includes a battery pack, a cell balancing circuit, and a plurality of inductors and capacitors.

Abstract: The present invention relates to a battery parameter management system and a battery parameter estimation method which are capable of simply estimating parameters of elements forming a battery equivalent model having a simple structure. The battery parameter system includes an amperemeter, a voltmeter, a control switch unit, and a processor, and the battery parameter estimation method includes supplying a pulse current, estimating resistance of an internal resistor, estimating capacitance of an internal capacitor, and estimating parameters of dynamic elements.

Abstract: A sample extraction apparatus for extracting samples from a target ground in order to assess whether liquefaction occurs in the target ground, includes: a casing; a holding sleeve, installed inside the casing, for holding the samples; and a vibrator configured to apply vibration accelerations corresponding to different seismic intensities to the samples in the casing, respectively, after the casing is inserted into the target ground to hold the samples of the target ground in the holding sleeve, so that a different liquefaction condition is provided for each sample, whereby said apparatus is configured such that, after having applied different vibration accelerations to the samples in the casing inserted into the target ground, respectively, said apparatus can resultantly extract the samples so that a liquefaction assessment can be made under a plurality of seismic conditions.

Abstract: Provided are a charge equalization apparatus and method for a battery string connected in series, and more particularly, are a charge equalization apparatus and method that efficiently perform charge equalization while reducing entire complexity and volume and lowering production costs through a configuration that an individual battery included in a battery string shares a single voltage sensing module and a single charge equalizing module; a switch block of a two-stage structure forms a current path for measuring voltage of individual batteries included in the battery string, and at the same time, forms a charging or discharging path of a low-charged or over-charged battery among the battery strings; and a switch device having low withstand voltage is used.

Abstract: A two-stage charge equalization apparatus for a series-connected battery string having a two-stage DC-DC converter including a first DC-DC converter; and a second DC-DC converter which is inputted. A battery string is divided into one or more battery modules having a plurality of battery cells connected in series, and a current conversion switch module forms a path of the charge current between the battery module and the second DC-DC converter to allow the charge current to be applied to the particular battery cell composing the battery module and controls an application direction of the charge current. A microprocessor determines a battery cell to be charged of a low-charged battery cell and controls the current conversion switch module to allow the charge current to be applied to the battery cell to be charged.