Abstract: A method of operating storage devices, a memory device, a host device, and a switch, is provided. The method includes: receiving, by the memory device, a first request corresponding to target user data from the host device; generating, by the memory device, first input/output (I/O) stream information based on telemetry information corresponding to the storage devices and map data in a buffer memory of the memory device based on the first request, wherein the first I/O stream information indicates a data path between a first storage device of the storage devices and the host device; providing, by the memory device, a first redirection request including the first request and the first I/O stream information to the host device or the first storage device through the switch; and processing the target user data according to the first I/O stream information in the first redirection request.

Abstract: A memory device is provided. The memory device includes: a buffer memory; and a memory controller configured to: obtain map data and meta data for recovering the map data from at least one external storage device; store the map data and the meta data obtained from the at least one external storage device in the buffer memory, the buffer memory being allocated for the at least one external storage device; translate a logical address corresponding to the at least one external storage device into a physical address of the buffer memory; and send the map data and the meta data to the at least one external storage device in response to detecting a sudden power-off event.

Abstract: A memory device is provided. The memory device includes: a buffer memory; a nonvolatile backup memory; and a memory controller configured to: store map data corresponding to an external storage device in the buffer memory; provide, in response to a request from the external storage device, an address pair corresponding to the request, from among address pairs of the map data, to the external storage device; and back up, in response to a sudden power-off event, the map data to the nonvolatile backup memory.

Abstract: A computing system includes a host, a memory, and a storage device. The memory includes a volatile memory and a memory controller. The storage device is connected with the host through a first interface and includes a nonvolatile memory and a storage controller, the storage device communicating with the host through a first port, communicating with the memory through a second port, and managing the memory. The memory is connected with the storage device through a second interface that is physically separated from the first interface. In an initialization operation, the storage controller sends map data that is stored in the nonvolatile memory to the memory through the second interface. In the initialization operation, the memory controller stores the map data in the volatile memory.

Abstract: A method of operating a computing system which includes a plurality of storage devices, a memory device, and a switch, is provided. The method includes: providing a first mapping request including first metadata corresponding to first user data to the memory device through the switch, by a first storage device of the plurality of storage devices; identifying a first standard corresponding to the first metadata based on the first mapping request, by the memory device; and generating first map data indicating a relationship between a first physical block address and a first logical block address of the first user data based on the first standard, by the memory device.

Abstract: An operating method of a memory device which communicates with a first storage device and a second storage device through an interface circuit is provided. The method includes receiving, from a host device, a first request including a command and a first logical block address; obtaining, based on the first logical block address, a first physical block address with reference to first map data dedicated for the first storage device; and sending, to the first storage device through the interface circuit, a second request including the first physical block address and the command.

Abstract: A computing system includes a first storage device, a second storage device, a memory device, and a compute express link (CXL) switch. The memory device stores first map data of the first storage device and second map data of the second storage device. The CXL switch is connected with the first storage device, the second storage device, and an external host through a first interface, and arbitrates communications between the first storage device, the second storage device, and the external host. The first storage device is connected with the memory device through a second interface. The second storage device is connected with the memory device through a third interface. The first interface, the second interface, and the third interface are physically separated from each other.

Abstract: A computing device includes a storage device and a memory. The storage device includes nonvolatile and internal buffer memories, and a storage controller that controls the nonvolatile and internal buffer memories and communicates with a bus. The memory includes a buffer memory and a memory controller that controls the buffer memory and communicates with the bus. The nonvolatile memory stores user data and map data. In an initialization operation, the storage controller sends the map data to the memory through the bus, and the memory controller stores the map data that is transferred from the storage device through the bus, in the buffer memory. After the initialization operation, the memory controller sends partial map data of the map data to the storage device through the bus, and the storage controller stores the partial map data that is transferred from the memory through the bus, in the internal buffer memory.

Abstract: A system includes a first compute express link (CXL) storage device, a second CXL storage device, a first CXL memory device, and a CXL switch connected to the first CXL storage device, the second CXL storage device and the first CXL memory device through a CXL interface, the CXL switch configured to arbitrate communications between the first CXL storage device and the second CXL storage device, and the first CXL memory device. The first CXL memory device is configured to store first map data of the first CXL storage device and second map data of the second CXL storage device, the first CXL storage device is configured to exchange at least a portion of the first map data with the first CXL memory device through the CXL switch, and the second CXL storage device is configured to exchange at least a portion of the second map data with the first CXL memory device through the CXL switch.

Abstract: A storage device includes a nonvolatile memory device that stores user data, and a storage controller that controls the nonvolatile memory device under control of a host device. The storage controller includes a storage interface circuit that communicates with the host device through a compute express link (CXL) interface, a NAND interface circuit that communicates with the nonvolatile memory device, and a processor that loads map data from an external memory device through the storage interface circuit and controls the nonvolatile memory device through the NAND interface circuit based on the map data.

Abstract: A memory expander includes a memory device that stores a plurality of task data. A controller controls the memory device. The controller receives metadata and a management request from an external central processing unit (CPU) through a compute express link (CXL) interface and operates in a management mode in response to the management request. In the management mode, the controller receives a read request and a first address from an accelerator through the CXL interface and transmits one of the plurality of task data to the accelerator based on the metadata in response to the read request.

Abstract: A memory expander includes a memory device that stores a plurality of task data. A controller controls the memory device. The controller receives metadata and a management request from an external central processing unit (CPU) through a compute express link (CXL) interface and operates in a management mode in response to the management request. In the management mode, the controller receives a read request and a first address from an accelerator through the CXL interface and transmits one of the plurality of task data to the accelerator based on the metadata in response to the read request.

Abstract: A memory expander includes a memory device that stores a plurality of task data. A controller controls the memory device. The controller receives metadata and a management request from an external central processing unit (CPU) through a compute express link (CXL) interface and operates in a management mode in response to the management request. In the management mode, the controller receives a read request and a first address from an accelerator through the CXL interface and transmits one of the plurality of task data to the accelerator based on the metadata in response to the read request.

Abstract: A memory expander includes a memory device having a first memory region corresponding to a first host and a second memory region corresponding to a second host. A controller communicates with the first host and the second host through a compute express link (CXL) interface. The controller receives a first CXL communication packet from the first host and performs a target data transfer operation of transferring target data stored in the first memory region to the second memory region, in response to the first CXL communication packet.