Patents by Inventor Chong-Chul Chai

Chong-Chul Chai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10410578
    Abstract: An organic light emitting display device includes a plurality of pixel columns, a first data wiring, a second data wiring, and a power supply wiring. The pixel columns include pixels repeatedly arranged in a first direction, and the pixel columns are repeatedly arranged in a second direction. The first and second directions are substantially perpendicular to each other. The first data wiring extends in the first direction and is connected to the pixels in an even row. The second data wiring extends in the first direction and are connected to the pixels in an odd row. The power supply wiring extends in the first direction between the first and second data wirings.
    Type: Grant
    Filed: July 1, 2015
    Date of Patent: September 10, 2019
    Assignee: Samsung Display Co., Ltd.
    Inventors: Hee-Rim Song, Yong-Koo Her, Mu-Kyung Jeon, Jong-Hee Kim, Chong-Chul Chai
  • Patent number: 10388220
    Abstract: A pixel including an organic light emitting diode; a first transistor for controlling the amount of current flowing from a first driving power source to a second driving power source via the organic light emitting diode, corresponding to a voltage of a first node; a second transistor coupled between the first node and a second node, the second transistor being turned on when a scan signal is supplied to an ith (i is a natural number) scan line; a third transistor coupled between the second node and an anode electrode of the organic light emitting diode; a first capacitor coupled between a data line and the second node; and a fourth transistor coupled between an initialization power source and the anode electrode of the organic light emitting diode. The fourth transistor is turned on in response to a first control signal being supplied to a first control line.
    Type: Grant
    Filed: September 7, 2017
    Date of Patent: August 20, 2019
    Assignee: Samsung Display Co., Ltd.
    Inventors: Bo Yong Chung, Jun Hyun Park, Young Wan Seo, An Su Lee, Kang Moon Jo, Chong Chul Chai
  • Publication number: 20190251906
    Abstract: A display apparatus includes a plurality of pixels. A pixel includes a first capacitor connected between a first voltage line receiving a first driving signal and a first node, a first transistor comprising a control electrode connected to the first node, a first electrode connected to a second voltage line receiving a first power source signal and a second electrode connected to a second node, an organic light emitting diode comprising an anode electrode connected to the second node and a cathode electrode receiving a second power source signal, a second capacitor connected between an m-th data line and the second node (wherein, ‘m’ is a natural number) and a second transistor comprising a control electrode connected to an n-th scan line (wherein, ‘n’ is a natural number), a first electrode connected to the first node and a second electrode connected to the second node.
    Type: Application
    Filed: April 22, 2019
    Publication date: August 15, 2019
    Inventors: Chong-Chul CHAI, Oh-Kyong KWON, Nack-Hyeon KEUM, Kyong-Hwan OH, Young-Wan SEO, Yong-Koo HER, In-Jae HWANG
  • Publication number: 20190251904
    Abstract: A display device having a frame period including reset, compensation, relay, emission, and initialization periods. Each pixel includes: an organic light emitting diode having an anode coupled to a second node and a electrode coupled to a second power source; a first transistor between a first power source and the second node, and a gate electrode coupled to a first node; a second transistor between the first node and the second node; a third transistor between the first power source and a third node; a fourth transistor between a fourth node and the third node; a fifth transistor between a data line and the fourth node; a sixth transistor between a third power source and the second node; a first capacitor between the third node and the first node; and a second capacitor coupled the fourth node and the third power source.
    Type: Application
    Filed: November 28, 2018
    Publication date: August 15, 2019
    Inventors: Dong Woo KIM, Bo Yong CHUNG, Yeon Kyung KIM, Chong Chul CHAI
  • Patent number: 10347207
    Abstract: A scan driver includes a plurality of stages to receive one or more clock signals, each of the plurality of stages to supply a carry signal to a corresponding first output terminal and to supply a scan signal to a corresponding second output terminal, corresponding to a voltage of a corresponding first node, and each of the plurality of stages including a reset unit, the reset unit to initialize the first node, the first output terminal, and the second output terminal, corresponding to a gate start pulse supplied to a corresponding reset input terminal.
    Type: Grant
    Filed: April 22, 2016
    Date of Patent: July 9, 2019
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jong Hee Kim, Ji Hye Lee, Chong Chul Chai
  • Patent number: 10311793
    Abstract: A display apparatus includes a plurality of pixels. A pixel includes a first capacitor connected between a first voltage line receiving a first driving signal and a first node, a first transistor comprising a control electrode connected to the first node, a first electrode connected to a second voltage line receiving a first power source signal and a second electrode connected to a second node, an organic light emitting diode comprising an anode electrode connected to the second node and a cathode electrode receiving a second power source signal, a second capacitor connected between an m-th data line and the second node (wherein, ‘m’ is a natural number) and a second transistor comprising a control electrode connected to an n-th scan line (wherein, ‘n’ is a natural number), a first electrode connected to the first node and a second electrode connected to the second node.
    Type: Grant
    Filed: January 6, 2017
    Date of Patent: June 4, 2019
    Assignees: SAMSUNG DISPLAY CO., LTD., INDUSTRY-UNIVERSITY COOPERATION FOUNDATION HANYANG UNIVERSITY
    Inventors: Chong-Chul Chai, Oh-Kyong Kwon, Nack-Hyeon Keum, Kyong-Hwan Oh, Young-Wan Seo, Yong-Koo Her, In-Jae Hwang
  • Publication number: 20190148477
    Abstract: A display device includes: an initialization power line extending along a first direction; a scan line extending along the first direction and spaced apart from the initialization power line, a data line and a driving voltage line insulated from the initialization power line and the scan line and extending along the second direction; a first switching element including a first electrode connected to the driving voltage line, a first gate electrode overlapping the initialization power line, and a second electrode; a second switching element including a third electrode connected to the first gate electrode, a second gate electrode connected to the scan line, and a fourth electrode; a third switching element including a fifth electrode connected to the fourth electrode, a third gate electrode connected to the initialization power line, and a sixth electrode connected to the second electrode; and a light emitting element connected to the second electrode.
    Type: Application
    Filed: November 13, 2018
    Publication date: May 16, 2019
    Inventors: Jun Hyun PARK, Cheol Gon LEE, Chong Chul CHAI, Yang Hwa CHOI
  • Patent number: 10283054
    Abstract: A pixel includes first to fourth transistors and a driving transistor. The first transistor is connected between a data line and a first node and has a gate electrode to receive a scan signal. The driving transistor is connected between the first node and a second node and has a gate electrode connected to a third node. The second transistor is connected between the second and third nodes and has a gate electrode to receive the scan signal. The third transistor is connected between first power and the first node and has a gate electrode to receive an emission signal. The fourth transistor is connected between the first and second nodes and has a gate electrode to receive an initialization signal. An organic light emitting diode is connected between the second node and second power. A storage capacitor is connected between the first power and third node.
    Type: Grant
    Filed: September 6, 2017
    Date of Patent: May 7, 2019
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jun-Hyun Park, An-Su Lee, Ji-Hye Lee, Bo-Yong Chung, Kang-Moon Jo, Chong-Chul Chai
  • Patent number: 10235955
    Abstract: A stage circuit includes an output part configured to supply a carry signal to a first output terminal and a scan signal to a second output terminal, in response to a voltage of a first node, a voltage of a second node, and a first clock signal being supplied to a first input terminal, a controller configured to control the voltage of the second node in response to the first clock signal being supplied to the first input terminal, a pull-up part configured to control the voltage of the first node in response to a carry signal of a previous stage being supplied to a second input terminal, and a pull-down part configured to control the voltage of the first node in response to the voltage of the second node and the carry signal of a next stage being supplied to a third input terminal.
    Type: Grant
    Filed: May 20, 2016
    Date of Patent: March 19, 2019
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jong Hee Kim, Ji Hye Lee, Chong Chul Chai
  • Publication number: 20190035336
    Abstract: An organic light emitting display device includes a plurality of pixels. A pixel on an ith horizontal line includes a first transistor coupled between a first power source and a first node and having a gate electrode coupled to a second node. An organic light emitting diode is coupled between the first node and a second power source. A second transistor is coupled between the second and third nodes and is turned on when a first scan signal is supplied to an ith first scan line. A third transistor is coupled between the third and first nodes. A first capacitor is coupled between an ith control line and the second node. A second capacitor is coupled between the third node and a data line. The pixels are simultaneously driven during first, second, and third periods of a frame period and sequentially driven during a fourth period of the frame period.
    Type: Application
    Filed: May 25, 2018
    Publication date: January 31, 2019
    Inventors: Jun Hyun PARK, Young Wan SEO, An Su LEE, Kang Moon JO, Chong Chul CHAI
  • Publication number: 20190019462
    Abstract: A stage circuit includes an output circuit configured to supply, to a first output terminal, a first clock signal supplied to a second input terminal or to supply a voltage of a second power source supplied to a second power input terminal, in response to voltages of a first node and a second node, an input circuit configured to control voltages of a third node and a fourth node in response to a shift pulse or a gate start pulse supplied to a first input terminal, a third clock signal supplied to a third input terminal, and a fourth clock signal supplied to a fourth input terminal, and a first driver configured to control the voltages of the first and second nodes in response to both the third clock signal and the voltages of the third and fourth nodes.
    Type: Application
    Filed: April 11, 2018
    Publication date: January 17, 2019
    Inventors: Sung Hwan KIM, Bon Yong KOO, Sun Kwang KIM, Chong Chul CHAI
  • Patent number: 10134352
    Abstract: A gate driving circuit includes: a pull-up controller applying a carry signal of one of previous stages to a first node in response to the carry signal of the one of the previous stages; a pull-up part outputting a clock signal as an N-th gate output signal; a carry part outputting the clock signal as an N-th carry signal; a first pull-down part pulling down the signal at the first node to a second off voltage; a second pull-down part pulling down the N-th gate output signal to a first off voltage; an inverting part generating an inverting signal based on the clock signal and the second off voltage to output the inverting signal to an inverting node; and a reset part outputting a reset signal to the inverting node.
    Type: Grant
    Filed: December 19, 2016
    Date of Patent: November 20, 2018
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jae-Keun Lim, Ji-Sun Kim, Kyoung-Ju Shin, Chong-Chul Chai, Jong-Hee Kim
  • Patent number: 10126891
    Abstract: A display device includes: a first substrate including a touch region for sensing a touch and a peripheral area surrounding the touch region; a second substrate facing the first substrate; thin film transistors positioned on the first substrate; pixel electrodes connected to the thin film transistors; common electrodes arranged to transmit a common voltage; sensing wires connected to the common electrodes and arranged to transmit a detection signal for sensing a touch; and a transparent electrode layer positioned on a first surface of the second substrate, the transparent electrode layer having a portion overlapping the peripheral area, and having at least one opening positioned over the touch region.
    Type: Grant
    Filed: March 8, 2016
    Date of Patent: November 13, 2018
    Assignee: Samsung Display Co., Ltd.
    Inventors: Yu Jin Lee, Ji-Sun Kim, Young Wan Seo, Chong Chul Chai
  • Patent number: 10102807
    Abstract: There is provided a display device including a display including a first pixel connected to a first data line and a second pixel connected to a second data line, a data signal generator configured to generate an output signal, and a signal divider configured to divide the output signal, to generate a first data signal and a second data signal, and to apply the first data signal and the second data signal to the first data line and the second data line, respectively, wherein the data signal generator is configured to generate the output signal based on a coupling effect of a first parasitic capacitor formed between the first data line and the second data line and a coupling effect of a parasitic capacitor of a data line formed by the first data line and second data line.
    Type: Grant
    Filed: May 17, 2016
    Date of Patent: October 16, 2018
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jae Keun Lim, Jong Hee Kim, Ji-Sun Kim, Young Wan Seo, Chong Chul Chai
  • Patent number: 10102803
    Abstract: A display apparatus includes a plurality of pixels. Each pixel includes a first capacitor connected between a first voltage line receiving a driving signal and a first node; a first transistor comprising a control electrode connected to the first node, a first electrode connected to a second voltage line receiving a first power source signal, and a second electrode connected to a second node; an organic light emitting diode comprising an anode electrode connected to the second node and a cathode electrode receiving a second power source signal; a second capacitor connected between an m-th data line and the second node; a second transistor comprising a control electrode connected to an n-th gate line, a first electrode connected to the first node, and a second electrode connected to the second node; and a third transistor comprising a control electrode connected to an n-th scan line, a first electrode connected to the first voltage line, and a second electrode connected to the second node.
    Type: Grant
    Filed: July 10, 2017
    Date of Patent: October 16, 2018
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jun-Hyun Park, An-Su Lee, Bo-Yong Chung, Chong-Chul Chai
  • Patent number: 10078995
    Abstract: A gate driver includes a plurality of stage circuits to output a clock signal from the outside as gate signals. A jth stage circuit includes an input unit to charge a first node at an initial voltage when a first input signal is input to a first input terminal, a buffer unit to output the clock signal as a gate signal to an output terminal when the initial voltage is supplied to the first node, a holding unit to maintain the first node at a reset power source level when the clock signal is supplied to the holding unit, and an inverter unit to supply the clock signal or the reset power source to the holding unit. The input unit maintains the first node at a second input signal input voltage to a second input terminal when a third input signal is input to a third input terminal.
    Type: Grant
    Filed: March 29, 2016
    Date of Patent: September 18, 2018
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jong Hee Kim, Ji Sun Kim, Young Wan Seo, Jae Keun Lim, Chong Chul Chai
  • Publication number: 20180226028
    Abstract: A pixel for a display panel includes first and second transistors, first and second capacitors, and an organic light emitting diode. The first transistor has a gate electrode connected to a first node, a first electrode connected to a first power source, and a second electrode connected to a second node. The second transistor has a gate electrode connected to a scan line, a first electrode connected to the first node, and a second electrode connected to the second node. The organic light emitting diode has a first electrode connected to the second node and a second electrode connected to a second power source. The first capacitor has a first electrode connected to a third power source and a second electrode connected to the first node. The second capacitor has a first electrode connected to a data line and a second electrode connected to the second node.
    Type: Application
    Filed: October 6, 2017
    Publication date: August 9, 2018
    Inventors: Jun-Hyun PARK, Young-Wan SEO, An-Su LEE, Bo-Yong CHUNG, Kang-Moon JO, Chong-Chul CHAI
  • Publication number: 20180226023
    Abstract: A display panel driver drives pixels based on first power having at least three voltage levels, second power having a constant voltage, and third power having two voltage levels. Each pixel includes a first transistor connected between first and second nodes and including a gate electrode to receive a scan signal, a second transistor connected between the second node and a third node in series with the first transistor and including a gate electrode to receive the third power, and a driving transistor connected between a source of the first power and the third node and including a gate electrode connected to the first electrode to control a driving current for an organic light emitting diode. A first capacitor is connected between a source of the third power and the first node, and a second capacitor is connected between the second node and one of the data lines.
    Type: Application
    Filed: January 5, 2018
    Publication date: August 9, 2018
    Inventors: Jun-Hyun PARK, Young-Wan SEO, An-Su LEE, Bo-Yong CHUNG, Kang-Moon JO, Chong-Chul CHAI
  • Publication number: 20180226029
    Abstract: A pixel includes first to fourth transistors and a driving transistor. The first transistor is connected between a data line and a first node and has a gate electrode to receive a scan signal. The driving transistor is connected between the first node and a second node and has a gate electrode connected to a third node. The second transistor is connected between the second and third nodes and has a gate electrode to receive the scan signal. The third transistor is connected between first power and the first node and has a gate electrode to receive an emission signal. The fourth transistor is connected between the first and second nodes and has a gate electrode to receive an initialization signal. An organic light emitting diode is connected between the second node and second power. A storage capacitor is connected between the first power and third node.
    Type: Application
    Filed: September 6, 2017
    Publication date: August 9, 2018
    Inventors: Jun-Hyun PARK, An-Su LEE, Ji-Hye LEE, Bo-Yong CHUNG, Kang-Moon JO, Chong-Chul CHAI
  • Publication number: 20180204510
    Abstract: A pixel including an organic light emitting diode; a first transistor for controlling the amount of current flowing from a first driving power source to a second driving power source via the organic light emitting diode, corresponding to a voltage of a first node; a second transistor coupled between the first node and a second node, the second transistor being turned on when a scan signal is supplied to an ith (i is a natural number) scan line; a third transistor coupled between the second node and an anode electrode of the organic light emitting diode; a first capacitor coupled between a data line and the second node; and a fourth transistor coupled between an initialization power source and the anode electrode of the organic light emitting diode. The fourth transistor is turned on in response to a first control signal being supplied to a first control line.
    Type: Application
    Filed: September 7, 2017
    Publication date: July 19, 2018
    Inventors: Bo Yong CHUNG, Jun Hyun PARK, Young Wan SEO, An Su LEE, Kang Moon JO, Chong Chul CHAI