Patents by Inventor Chong-Wai LO

Chong-Wai LO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9202693
    Abstract: A method of forming an ultra-shallow junction in a semiconductor substrate. The method includes forming an amorphous region in a semiconductor substrate by performing a pre-amorphization implant step and implanting one or more dopants in the amorphous region by performing a monolayer doping step. The semiconductor substrate is then thermally treated to activate the implanted dopant in the amorphous region to thereby form an ultra-shallow junction in the semiconductor substrate. The thermal treatment can be performed without any oxide cap overlying the implanted amorphous region.
    Type: Grant
    Filed: January 28, 2013
    Date of Patent: December 1, 2015
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Li-Ting Wang, Chun-Feng Nieh, Chong-Wai Lo
  • Publication number: 20140213047
    Abstract: A method of forming an ultra-shallow junction in a semiconductor substrate. The method includes forming an amorphous region in a semiconductor substrate by performing a pre-amorphization implant step and implanting one or more dopants in the amorphous region by performing a monolayer doping step. The semiconductor substrate is then thermally treated to activate the implanted dopant in the amorphous region to thereby form an ultra-shallow junction in the semiconductor substrate. The thermal treatment can be performed without any oxide cap overlying the implanted amorphous region.
    Type: Application
    Filed: January 28, 2013
    Publication date: July 31, 2014
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Li-Ting WANG, Chun-Feng NIEH, Chong-Wai LO