Abstract: An absorber and a method of forming an absorber. The absorber may include a semiconductor absorption structure doped with dopants of a first conductivity type. The absorber may also include a semiconductor substrate doped with dopants of a second conductivity type different from the first conductivity type. The absorber may further include a dielectric layer between the semiconductor absorption structure and the semiconductor substrate. The absorber may additionally include a buried semiconductor structure included in a cavity of the dielectric layer, the buried semiconductor structure doped with dopants of the first conductivity type.

Abstract: There are proposed a method, device, apparatus, and medium for protecting sensitive data. In a method, to-be-processed data is received from a server device. A processing result of a user for the to-be-processed data is received, the processing result comprising sensitive data of the user for the processing of the to-be-processed data. A gradient for training a server model at the server device is determined based on a comparison between the processing result and a prediction result for the to-be-processed data. The gradient is updated in a change direction associated with the gradient so as to generate an updated gradient to be sent to the server device. Noise is added only in the change direction associated with the gradient. The corresponding overhead of processing noise in a plurality of directions can be reduced, and no excessive noise data interfering with training will be introduced to the updated gradient.

Abstract: The present disclosure describes techniques for determining performance of a classifier. A first machine learning model and a second machine learning model may be trained by aggregating updates to the first machine learning model and the second machine learning model received from a plurality of client computing devices. A cumulative distribution function (CDF) associated with a distribution of the positive samples in the user data may be estimated using the trained first machine learning model. A probability density function (PDF) associated with a distribution of the negative samples in the user data may be estimated using the trained second machine learning model. An integration-based computation of an area under the receiver operating characteristic curve (AUC) of the classifier may be performed using the PDF and the CDF.

Abstract: The present disclosure describes techniques of performing machine unlearning in a recommendation model. An unlearning process of the recommendation model may be initiated in response to receiving a request for deleting a fraction of user data from any particular user. The recommendation model may be pre-trained to recommend content to users based at least in part on user data. Values of entries in a matrix corresponding to the fraction of user data may be configured as zero. The matrix may comprise entries denoting preferences of users with respect to content items. Confidence values associated with the fraction of user data may be configured as zero to block influence of the fraction of user data on performance of the recommendation model. The unlearning process may be implemented by performing a number of iterations until the recommendation model has converged.

Abstract: A structure of a CMOS image sensory device is described. A photodiode sensory region and a transistor device region are isolated from each other by an isolation layer formed in the substrate. A gate structure is located on the transistor device region, and a source/drain region is in the transistor device region beside the side of the gate structure. A doped region is in the photodiode sensory region. A self-aligned block is located on the photodiode sensory region and a protective layer is formed on the entire substrate.

Abstract: The invention is related to a kind of security trade system of fund flow authentication, which is to make the trade flow of the customer(the payer) and the shop(the payee) to be a “two-step shopping mode to promote the security and versatility of fund flow trade; it includes one separate fund flow authentication center to be convenient for the customer and the shop to apply the establishment of authentication and management service; said fund flow authentication center also needs to constitute an information connected authentication system respectively with the credit extension bank of said customer and the credit card association center to provide the data link required by the process of fund flow trade; said customer and said shop also need to have a transmission device respectively to receive and send the trade data by the online of said fund flow authentication center with Internet etc.

Abstract: A cavity for use in an accelerator is formed by an inner wall including at least two different materials. According to embodiments of the present invention, a portion of the structure forming the inner wall of the cavity includes a first material (e.g., copper) while another portion forming the inner wall of the cavity includes a second material (e.g., steel). Using different materials for different portions of the inner walls forming a cavity may cause different Q-factors for the cavity while the shape of the cavity remains constant.

Abstract: A fabrication method for a CMOS image sensory device is described. An isolation layer is formed in the substrate to isolate a photodiode sensory region and a transistor device region. A gate structure is further formed on the transistor device region, followed by forming concurrently a source/drain region in the transistor device region beside the side of the gate structure and a doped region in the photodiode sensory region. Thereafter, a self-aligned block is formed on the photodiode sensory region, followed by forming a protective layer on the substrate.

Abstract: A cavity for use in an accelerator is formed by an inner wall comprised of at least two different materials. According to embodiments of the present invention, a portion of the structure forming the inner wall of the cavity may be comprised of a first material (e.g., copper) while another portion forming the inner wall of the cavity may be comprised of a second material (e.g., steel). Using different materials for different portions of the inner walls forming a cavity may cause different Q-factors for the cavity while the shape of the cavity remains constant.

Abstract: A image sensor device is formed on a semiconductor wafer comprising a silicon substrate of a first conductive type. The image sensor device includes a photo sensor, an insulation layer, a MOS transistor and a deep doped region. The photo sensor is composed of a shallow doped region of a second conductive type. The shallow doped region is formed on a surface of the substrate and has a first predetermined depth. The insulation layer has a second predetermined depth and is positioned on the surface of the substrate to surround the photo sensor. The second predetermined depth is greater than the first predetermined depth. The MOS transistor is formed on the semiconductor wafer and electrically connected with the photo sensor. The deep doped region of the first conductive type is formed in the substrate under the insulation layer, and a dopant concentration of the deep doped region has a Gauss distribution.

Abstract: A plurality of active pixel sensors are formed on the surface of a semiconductor wafer. The semiconductor wafer comprises a P-type substrate, an active pixel sensor region and a periphery circuit region. A first active pixel sensor block mask (APSB mask) is formed to cover the active pixel sensor region, then at least one N-well on the surface of the semiconductor wafer not covered by the first APSB mask is formed. A second APSB mask and at least one N-well mask are formed to cover the active pixel sensor region and the region outside the P-well region. At least one P-well on the surface of the semiconductor wafer not covered by the second APSB mask and the N-well mask is formed. Finally, at least one photodiode and at least one complementary metal-oxide semiconductor (CMOS) transistor are formed on the surface of the active pixel sensor region.

Abstract: A plurality of active pixel sensors are formed on the surface of a semiconductor wafer. The semiconductor wafer comprises a P-type substrate, an active pixel sensor region and a periphery circuit region. A first active pixel sensor block mask (APSB mask) is formed to cover the active pixel sensor region, then at least one N-well on the surface of the semiconductor wafer not covered by the first APSB mask is formed. A second APSB mask and at least one N-well mask are formed to cover the active pixel sensor region and the region outside the P-well region. At least one P-well on the surface of the semiconductor wafer not covered by the second APSB mask and the N-well mask is formed. Finally, at least one photodiode and at least one complementary metal-oxide semiconductor (CMOS) transistor are formed on the surface of the active pixel sensor region.

Abstract: A method of fabricating CMOS image sensor. On a substrate, an isolation layer is formed to partition the substrate into a photodiode sensing region and a transistor element region. Next, on the transistor element region, a gate electrode structure is formed and then, a source/drain region is formed at the transistor element region of the two lateral sides of the gate electrode structure. At the same time, a doping region is formed on the photodiode sensing region. After that, a self-aligned barrier layer is formed on the photodiode sensing region and a protective layer is formed on the substrate. Then, a dielectric layer and a metallic conductive wire are successively formed on the protective layer. Again, a protective layer is formed on the dielectric layer and the metallic conductive wire, wherein the numbers of the dielectric layers and the metallic conductive wire depend on the fabrication process. A protective layer is formed between every dielectric layer.

Abstract: A method of fabricating CMOS image sensor. On a substrate, an isolation layer is formed to partition the substrate into a photodiode sensing region and a transistor element region. Next, on the transistor element region, a gate electrode structure is formed and then, a source/drain region is formed at the transistor element region of the two lateral sides of the gate electrode structure. At the same time, a doping region is formed on the photodiode sensing region. After that, a self-aligned barrier layer is formed on the photodiode sensing region and a protective layer is formed on the substrate. Then, a dielectric layer and a metallic conductive wire are successively formed on the protective layer. Again, a protective layer is formed on the dielectric layer and the metallic conductive wire, wherein the numbers of the dielectric layers and the metallic conductive wire depend on the fabrication process. A protective layer is formed between every dielectric layer.

Abstract: A fabrication method for a CMOS image sensory device is described. An isolation layer is formed in the substrate to isolate a photodiode sensory region and a transistor device region. A gate structure is further formed on the transistor device region, followed by forming concurrently a source/drain region in the transistor device region beside the side of the gate structure and a doped region in the photodiode sensory region. Thereafter, a self-aligned block is formed on the photodiode sensory region, followed by forming a protective layer on the substrate.

Abstract: A structure of a CMOS image sensory device is described. A photodiode sensory region and a transistor device region are isolated from each other by an isolation layer formed in the substrate. A gate structure is located on the transistor device region, and a source/drain region is in the transistor device region beside the side of the gate structure. A doped region is in the photodiode sensory region. A self-aligned block is located on the photodiode sensory region and a protective layer is formed on the entire substrate.

Abstract: A method of fabricating CMOS image sensor. On a substrate, an isolation layer is formed to partition the substrate into a photodiode sensing region and a transistor element region. Next, on the transistor element region, a gate electrode structure is formed and then, a source/drain region is formed at the transistor element region of the two lateral sides of the gate electrode structure. At the same time, a doping region is formed on the photodiode sensing region. After that, a self-aligned barrier layer is formed on the photodiode sensing region and a protective layer is formed on the substrate. Then, a dielectric layer and a metallic conductive wire are successively formed on the protective layer. Again, a protective layer is formed on the dielectric layer and the metallic conductive wire, wherein the numbers of the dielectric layers and the metallic conductive wire depend on the fabrication process. A protective layer is formed between every dielectric layer.

Abstract: A method of fabricating CMOS image sensor. On a substrate, an isolation layer is formed to partition the substrate into a photodiode sensing region and a transistor element region. Next, on the transistor element region, a gate electrode structure is formed and then, a source/drain region is formed at the transistor element region of the two lateral sides of the gate electrode structure. At the same time, a doping region is formed on the photodiode sensing region. After that, a self-aligned barrier layer is formed on the photodiode sensing region and a protective layer is formed on the substrate. Then, a dielectric layer and a metallic conductive wire are successively formed on the protective layer. Again, a protective layer is formed on the dielectric layer and the metallic conductive wire, wherein the numbers of the dielectric layers and the metallic conductive wire depend on the fabrication process. A protective layer is formed between every dielectric layer.

Abstract: The present invention is a method for integrating an anti-reflection layer and a salicide block. The method comprises the following steps: A substrate is provided that is divided into at least a sensor area and a transistor area, wherein the sensor area comprises a doped region and the transistor area comprises a transistor that includes a gate, a source and a drain; forming a composite layer on the substrate, wherein the composite layer at least also covers both the sensor area and the transistor area, and the composite layer increases the refractive index of light that propagates from the doped region into the composite layer; performing an etching process and a photolithography process to remove part of the composite layer and to let top of the gate, the source and the drain are not covered by the composite layer; and performing a salicide process to let top of the gate, the source and the drain are covered by a silicate.

Abstract: The present invention is a method for integrating an anti-reflection layer and a salicide block. The method comprises following steps: provide a substrate that is divided into at least a sensor area and a transistor area, wherein the sensor area comprises a doped region and the transistor area comprises a transistor that includes a gate, a source and a drain; forms a composite layer on the substrate, herein the composite layer at least also covers both sensor area and transistor area, and the composite layer increases refractive index of light that propagate from the doped region into the composite layer; performs an etching process and a photolithography process to remove part of the composite layer and to let top of the gate, the source and the drain are not covered by the composite layer; and performs a salicide process to let top of the gate, the source and the drain are covered by a silicate.