Patents by Inventor Choon-Ho SONG

Choon-Ho SONG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240125988
    Abstract: The present invention provides an optical filter for its use. In the present invention, it is possible to provide an optical filter that effectively blocks ultraviolet ray and infrared ray and exhibits high transmittance in visible light. Furthermore, it is possible to provide an optical filter where the transmission characteristics are stably maintained even when an incident angle is changed. Moreover, it is possible to provide an optical filter that does not exhibit problems such as ripple or petal flare.
    Type: Application
    Filed: September 28, 2023
    Publication date: April 18, 2024
    Inventors: Joon Ho JUNG, Seon Ho YANG, Sung Min HWANG, Choon Woo JI, Tae Jin SONG
  • Patent number: 9989856
    Abstract: Disclosed is a method of manufacturing semiconductor devices. A dummy gate structure is formed on a pattern area defined by an edge area of a substrate. An interlayer insulating layer pattern is formed to cover the pattern area and exposing the edge area of the substrate. A blocking pattern is formed on the interlayer insulating layer pattern such that the edge area of the substrate is covered with the blocking pattern and the pattern area of the substrate is exposed through the blocking pattern. A gate hole in the pattern area of the substrate in correspondence to the dummy gate structure, and a metal gate structure is formed in the gate hole. Accordingly, the edge area of the substrate is protected in the etching process and the deposition process of the replacement gate metal (RGM) process.
    Type: Grant
    Filed: March 25, 2016
    Date of Patent: June 5, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jung-Woo Seo, Sang-Jin Kim, Jong-Seo Hong, Jong-Hoon Nah, Choon-Ho Song
  • Publication number: 20160293728
    Abstract: Disclosed is a method of manufacturing semiconductor devices. A dummy gate structure is formed on a pattern area defined by an edge area of a substrate. An interlayer insulating layer pattern is formed to cover the pattern area and exposing the edge area of the substrate. A blocking pattern is formed on the interlayer insulating layer pattern such that the edge area of the substrate is covered with the blocking pattern and the pattern area of the substrate is exposed through the blocking pattern. A gate hole in the pattern area of the substrate in correspondence to the dummy gate structure, and a metal gate structure is formed in the gate hole. Accordingly, the edge area of the substrate is protected in the etching process and the deposition process of the replacement gate metal (RGM) process.
    Type: Application
    Filed: March 25, 2016
    Publication date: October 6, 2016
    Inventors: Jung-Woo SEO, Sang-Jin KIM, Jong-Seo HONG, Jong-Hoon NAH, Choon-Ho SONG