Abstract: There is provided an optical encoding system including a photodiode array and a code disk opposite to each other. The code disk is arranged with multiple code slits at a ring area corresponding to the photodiode array. A length direction of each photodiode of the photodiode array has at least one deviation angle with respect to a length direction of the multiple code slits to reduce the total harmonic distortion in photocurrents.

Abstract: Embodiments include package substrates and method of forming the package substrates. A package substrate includes a dielectric over a conductive layer, and a conductive line on the dielectric. The package substrate includes a plurality of conductive bumps on a surface of the conductive line, where the conductive bumps are conductively coupled to the conductive line, and a solder resist over the conductive line and the dielectric. The surface of the conductive line may be a bottom surface, where the conductive bumps are below the conductive line and conductively coupled to the bottom surface of the conductive line, and where the conductive bumps may be embedded in the dielectric. The surface of the conductive line may be a top surface, where the conductive bumps are above the conductive line and conductively coupled to the top surface of the conductive line, and wherein the conductive bumps are embedded in the solder resist.

Abstract: Disclosed are a pearlescent pigment and a preparation method therefor, wherein the pigment has a multilayered structure including a low-refractive index material layer between high-refractive index material layers on a glass flake substrate and thus has high color intensity, various colors depending on the viewing angle, and an improved sparkling effect. The pearlescent pigment according to the present invention comprises: a glass flake substrate having a D10 value of 40-80 ?m, a D50 value of 160-250 ?m, and a D90 value of 350-600 ?m and a thickness of 500 nm or more; and a metal oxide layer coated on the substrate, the metal oxide layer having a structure of a first metal oxide layer/an intermediate oxide layer containing MgO·SiO2/a second metal oxide layer.

Abstract: An integrated circuit may include circuitry for accessing an associated die stack. The circuitry may receive temperature information as well as a plurality of operating parameters that help determine whether it may be desirable to reroute access commands or requests to one or more die in the stack. The circuitry may include a smart crossbar switch that implements an address translation or hashing function to help map the logical user address to a physical address space. Performing thermally aware traffic management in this way can ensure that acceptable timing margins are maintained in the system to minimize the probability of errors.

Abstract: An integrated circuit may include circuitry for accessing an associated die stack. The circuitry may receive temperature information as well as a plurality of operating parameters that help determine whether it may be desirable to reroute access commands or requests to one or more die in the stack. The circuitry may include a smart crossbar switch that implements an address translation or hashing function to help map the logical user address to a physical address space. Performing thermally aware traffic management in this way can ensure that acceptable timing margins are maintained in the system to minimize the probability of errors.

Abstract: An integrated circuit may include circuitry for accessing an associated die stack. The circuitry may receive temperature information as well as a plurality of operating parameters that help determine whether it may be desirable to reroute access commands or requests to one or more die in the stack. The circuitry may include a smart crossbar switch that implements an address translation or hashing function to help map the logical user address to a physical address space. Performing thermally aware traffic management in this way can ensure that acceptable timing margins are maintained in the system to minimize the probability of errors.

Abstract: An integrated circuit may include circuitry for accessing an associated die stack. The circuitry may receive temperature information as well as a plurality of operating parameters that help determine whether it may be desirable to reroute access commands or requests to one or more die in the stack. The circuitry may include a smart crossbar switch that implements an address translation or hashing function to help map the logical user address to a physical address space. Performing thermally aware traffic management in this way can ensure that acceptable timing margins are maintained in the system to minimize the probability of errors.

Abstract: Provided are an apparatus and a method for representing a multi-level LOD three-dimensional image. The present invention configures a multi-level LOD hierarchical mesh for each hierarchical level with a different LOD level by arranging triangular patches of a upper hierarchical level(lower resolution) to have approximately k×k of triangular patches of an lower hierarchical level (higher resolution) and samples information on height of a target image to allocate the sampled height information to each vertex of the triangular patches included in the multi-level LOD hierarchical mesh, determines an LOD of each triangular patch according to a view point of a virtual camera, and connects the adjacent triangular patches without gaps when adjacent triangular patches among the triangular patches of the multi-level LOD hierarchical mesh have different LOD levels.