Patents by Inventor Choong-reol Yang

Choong-reol Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9059844
    Abstract: A high-speed Ethernet apparatus having a multiple lane configuration and method for selectively operating the multiple lanes to allow lanes to participate or not in data transmission and reception. The Ethernet apparatus includes: a transfer rate control unit to set a state of each of multiple physical coding sub-layer (PCS) lanes inside to be the same as a state of corresponding each of multiple physical transmission lanes based on state change information that indicates whether the each physical transmission lane is activated or not, and to remove idle blocks from data blocks which are received at a transfer rate of a physical transmission lane in active state among the multiple physical transmission lanes; and a block allocating unit to allocate the data blocks from which the idle blocks have been removed through PCS lanes in active state that correspond to the physical transmission lanes in active state.
    Type: Grant
    Filed: December 14, 2011
    Date of Patent: June 16, 2015
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Kye-Hyun Ahn, Choong-Reol Yang, Seung-Hwan Kim, Kyeong-Eun Han
  • Patent number: 8989227
    Abstract: In a VCSEL driver for automatic bias control and automatic modulation control, the VCSEL driver includes: a feedback module configured to receive an output of a VCSEL to provide a bias signal through a feedback loop; an automatic bias control block configured to adjust a bias current by switching on or off a plurality of power sources, which are connected in parallel with each other; an automatic modulation control block configured to connect in parallel a plurality of bias transistors that are connected to each of the plurality of power sources, and to adjust modulation current by switching each of the plurality of bias transistors on or off; and a main driver configured to provide the VCSEL with a drive current including the bias current and the modulation current, which are adjusted by control of each of the control blocks.
    Type: Grant
    Filed: June 30, 2014
    Date of Patent: March 24, 2015
    Assignee: Electronics and Telecommunications Research Institute
    Inventor: Choong-Reol Yang
  • Publication number: 20140294026
    Abstract: A laser diode driving apparatus for optical communication is provided so as to prepare a low-price and low-power optical transmission and reception apparatus by realizing the high performance laser diode driving apparatus for optical communication with a structure appropriate for a multichannel array that can easily and effectively provide stable bandwidths and high gains of the optical communication laser diode at a transmission end of the optical transmission and reception apparatus.
    Type: Application
    Filed: November 14, 2013
    Publication date: October 2, 2014
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Choong-Reol YANG, Sang-Soo LEE
  • Patent number: 8837542
    Abstract: A laser diode driving apparatus for optical communication is provided so as to prepare a low-price and low-power optical transmission and reception apparatus by realizing the high performance laser diode driving apparatus for optical communication with a structure appropriate for a multichannel array that can easily and effectively provide stable bandwidths and high gains of the optical communication laser diode at a transmission end of the optical transmission and reception apparatus.
    Type: Grant
    Filed: November 14, 2013
    Date of Patent: September 16, 2014
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Choong-Reol Yang, Sang-Soo Lee
  • Patent number: 8737461
    Abstract: Disclosed are a receiving equalization device and a method thereof, the receiving equalization device including a subtracter to output a first output signal, an eye monitor block to obtain a sampling timing by using the output first signal, and a slicer to generate a sampling signal by sampling the first output signal based on the sampling timing, and to return the generated sampling signal to the subtracter via a feedback filter or an algorithm determining block.
    Type: Grant
    Filed: September 16, 2010
    Date of Patent: May 27, 2014
    Assignee: Electronics and Telecommunications Research Institute
    Inventor: Choong Reol Yang
  • Patent number: 8446941
    Abstract: Disclosed are an equalizer and an equalization method employing an adaptive algorithm for high speed data transmissions. The equalizer includes: a subtraction unit subtracting a feedback signal from an input signal to generate a subtraction signal; a timing signal generation unit generating a sampling timing signal; an equalization signal generation unit equalizing the subtraction signal according to the sampling timing signal to generate an equalization signal; and a feedback signal generation unit calculating a filter coefficient value by using the subtraction signal and the equalization signal, delaying the equalization signal, and weighting the delayed equalization signal according to the filter coefficient value to generate a feedback signal.
    Type: Grant
    Filed: September 14, 2010
    Date of Patent: May 21, 2013
    Assignee: Electronics and Telecommunications Research Institute
    Inventor: Choong Reol Yang
  • Patent number: 8208529
    Abstract: Provided are an equalization apparatus and method of compensating a distorted received signal. The equalization apparatus includes: a filter unit removing inter-symbol interference (ISI) from a multi-channel signal that is received; and a zero-offset controller identifying a zero offset of the multi-channel signal and determining operating coefficients of the filter unit by reflecting the identified zero offset. A response filter, which reduces loss and noise, can be used, and the structure of the response filter can be simplified. In addition, channel characteristics are estimated in real time at an initial stage of data transmission and reception. Thus, an equalizer optimized for channel interference characteristics can be provided.
    Type: Grant
    Filed: November 9, 2009
    Date of Patent: June 26, 2012
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Choong-reol Yang, Je-soo Ko
  • Publication number: 20120155486
    Abstract: A high-speed Ethernet apparatus having a multiple lane configuration and method for selectively operating the multiple lanes to allow lanes to participate or not in data transmission and reception. The Ethernet apparatus includes: a transfer rate control unit to set a state of each of multiple physical coding sub-layer (PCS) lanes inside to be the same as a state of corresponding each of multiple physical transmission lanes based on state change information that indicates whether the each physical transmission lane is activated or not, and to remove idle blocks from data blocks which are received at a transfer rate of a physical transmission lane in active state among the multiple physical transmission lanes; and a block allocating unit to allocate the data blocks from which the idle blocks have been removed through PCS lanes in active state that correspond to the physical transmission lanes in active state.
    Type: Application
    Filed: December 14, 2011
    Publication date: June 21, 2012
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Kye-Hyun AHN, Choong-Reol Yang, Seung-Hwan Kim, Kyeong-Eun Han
  • Publication number: 20110317754
    Abstract: Disclosed are an equalizer and an equalization method employing an adaptive algorithm for high speed data transmissions. The equalizer includes: a subtraction unit subtracting a feedback signal from an input signal to generate a subtraction signal; a timing signal generation unit generating a sampling timing signal; an equalization signal generation unit equalizing the subtraction signal according to the sampling timing signal to generate an equalization signal; and a feedback signal generation unit calculating a filter coefficient value by using the subtraction signal and the equalization signal, delaying the equalization signal, and weighting the delayed equalization signal according to the filter coefficient value to generate a feedback signal.
    Type: Application
    Filed: September 14, 2010
    Publication date: December 29, 2011
    Applicant: Electronics and Telecommunications Research Institute
    Inventor: Choong Reol Yang
  • Publication number: 20110129010
    Abstract: Disclosed are a receiving equalization device and a method thereof, the receiving equalization device including a subtracter to output a first output signal, an eye monitor block to obtain a sampling timing by using the output first signal, and a slicer to generate a sampling signal by sampling the first output signal based on the sampling timing, and to return the generated sampling signal to the subtracter via a feedback filter or an algorithm determining block.
    Type: Application
    Filed: September 16, 2010
    Publication date: June 2, 2011
    Applicant: Electronics and Telecommunications Research Institute
    Inventor: Choong Reol YANG
  • Publication number: 20100158096
    Abstract: Provided are an equalization apparatus and method of compensating a distorted received signal. The equalization apparatus includes: a filter unit removing inter-symbol interference (ISI) from a multi-channel signal that is received; and a zero-offset controller identifying a zero offset of the multi-channel signal and determining operating coefficients of the filter unit by reflecting the identified zero offset. A response filter, which reduces loss and noise, can be used, and the structure of the response filter can be simplified. In addition, channel characteristics are estimated in real time at an initial stage of data transmission and reception. Thus, an equalizer optimized for channel interference characteristics can be provided.
    Type: Application
    Filed: November 9, 2009
    Publication date: June 24, 2010
    Inventors: Choong-reol Yang, Je-soo Ko