Abstract: A level shifter is disclosed. The input circuit receives an input signal operating within a first voltage range that is defined by a first voltage level. A pull-up circuit is coupled between a second voltage line and the input circuit. The second voltage line supplies a second voltage level. The second voltage level is higher than the first voltage level. A first connection node between the pull-up circuit and the input circuit serves as an output terminal of the level shifter. An acceleration circuit coupled to the first connection node accelerates the low-to-high transition at the output terminal. The acceleration controller for the acceleration circuit includes a first series of pulse generation transistors driven by first driving signals which have time differences therebetween, so that the acceleration controller enables the acceleration circuit in a pulse manner. The first driving signals are derived from the input signal.

Abstract: A glitch-free low-pass filter circuit includes an integrating circuit, a Schmitt trigger, a first feedback logic circuit and a second feedback logic circuit. The integrating circuit is used to integrate an input signal to generate an integral signal. The Schmitt trigger is used to receive the integral signal to generate a hysteresis signal. The first feedback logic circuit is used to pull the integral signal to a reset voltage or up to the set voltage based on an inverted input signal and an inverted hysteresis signal, wherein the inverted input signal and the inverted hysteresis signal are generated by performing an inversion process. The second feedback logic circuit is used to pull the integral signal down to the reset voltage or up to the set voltage based on the inverted hysteresis signal and an output signal, wherein the output signal is generated by performing the inversion process twice.

Abstract: A glitch-free low-pass filter circuit includes an integrating circuit, a Schmitt trigger, a first feedback logic circuit and a second feedback logic circuit. The integrating circuit is used to integrate an input signal to generate an integral signal. The Schmitt trigger is used to receive the integral signal to generate a hysteresis signal. The first feedback logic circuit is used to pull the integral signal to a reset voltage or up to the set voltage based on an inverted input signal and an inverted hysteresis signal, wherein the inverted input signal and the inverted hysteresis signal are generated by performing an inversion process. The second feedback logic circuit is used to pull the integral signal down to the reset voltage or up to the set voltage based on the inverted hysteresis signal and an output signal, wherein the output signal is generated by performing the inversion process twice.