Abstract: A method to compensate for color-shifting at the periphery of a display device inputs for processing pre-display an image for display, acquires edge pixels where color-shifting occurs, and applies compensation in terms of a gray scale value to each of the edge pixels to reduce such color-shifting. An electronic circuit applying the method and a compensated display device are also disclosed.

Abstract: A bit block transfer (Bitblt) circuit includes a read register, a write register, a bit shifting circuit and an overflowing register. The read register stores decomposition data including original data. The bit shifting circuit shifts the decomposition data in the read register to the write register and shifts bits of the decomposition data in the write register such that an initial bit of the original data of the decomposition data is situated apart from an initial address of the write register by a bit-shifting amount. The overflowing register coupled to the write register stores overflowing data of the original data overflowing from a memory length of the write register when the bits of the decomposition data in the write register are being shifted. The write register outputs and writes the decomposition data therein to a memory cell of a first memory.

Abstract: A display method of an OSD and a display system are provided herein. In the display method, a plurality of symbols are respectively compressed into a plurality of codewords according to an encoding process, and the codewords are stored in a memory module. A plurality of index values respectively corresponding to the symbols are established in a codebook and the codebook is stored in the memory module, wherein the index values are address information of storing the codewords in the memory module. The index value corresponding to a designation symbol of the symbols is searched out from the codebook according to an input command corresponding to the designation symbol, and a decoding process is performed on the codeword corresponding to the designation symbol from the memory module for displaying the designation symbol on the display. Therefore, a storage space of the memory module is reduced by compressing the symbols.

Abstract: An image scaling method is disclosed. In the image scaling method, at first dividing an original image into a plurality of original image columns, wherein each of the original image columns comprises original pixel rows. Thereafter respectively performing a scaling step on the original image columns, thereby generating scaled image columns. Then combining each of the scaled image columns. In the scaling step, writing some of the original pixel rows into a buffer, wherein the buffer is first in first out (FIFO) buffer. Thereafter performing an interpolation on the data stored in the buffer to generate first scaled pixel rows. Then sequentially writing the other original pixel rows into the buffer, and performing the interpolation on the data stored in the buffer after each one of the other original pixel rows is written into the buffer, thereby generating second pixel rows. Thereafter combining the first and second pixel rows.

Abstract: An image warping method is disclosed, and comprises: providing a source polygon; providing a warping relationship; dividing the source polygon into a plurality of source triangles; sequentially performing a warping step on the source triangles one by one to generate a plurality of warped triangles; and combining the warped triangles to generate a warped polygon.

Abstract: A bit block transfer (Bitblt) circuit includes a read register, a write register, a bit shifting circuit and an overflowing register. The read register stores decomposition data including original data. The bit shifting circuit shifts the decomposition data in the read register to the write register and shifts bits of the decomposition data in the write register such that an initial bit of the original data of the decomposition data is situated apart from an initial address of the write register by a bit-shifting amount. The overflowing register coupled to the write register stores overflowing data of the original data overflowing from a memory length of the write register when the bits of the decomposition data in the write register are being shifted. The write register outputs and writes the decomposition data therein to a memory cell of a first memory.

Abstract: A device and method for region-based bitblt with clipping-in or clipping-out. Data within a source bitblt region at a first source base address is selectively moved to a destination bitblt region at a first destination base address. One or more bitblt commands are produced if one or more regions within the source bitblt region are to be moved. The bitblt commands are temporarily stored in a plurality of buffer memories. Each of the bitblt commands are decoded into a second source base address, a second destination base address, a height parameter, and a width parameter. The regions to be moved are bitblted to the destination bitblt region based on the second source base address, the second destination base address, and the corresponding height and width parameters.