Patents by Inventor Chou Loke

Chou Loke has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050260850
    Abstract: A method of forming an interconnect for a semiconductor device using triple hard layers, comprises: forming a first hard layer serving as an etch stop layer on a metal interconnect-formed dielectric layer; forming a second hard layer on the first hard layer; forming a dielectric layer on the second hard layer; forming a third hard layer on the dielectric layer; forming a hole through the third and second hard layers, the dielectric layer, and the first hard layer; and filling the hole with metal to establish an interconnect. The second and third hard layers are each made of carbon-doped silicon oxide formed from a source gas and a redox gas, while controlling the carbon content in the second hard layer as a function of a flow rate of the redox gas.
    Type: Application
    Filed: May 24, 2004
    Publication date: November 24, 2005
    Applicant: ASM JAPAN K.K.
    Inventors: Chou Loke, Kanako Yoshioka, Kiyoshi Satoh
  • Publication number: 20050178333
    Abstract: A thin-film deposition system includes a plasma CVD reactor; a remote plasma chamber; and an electromagnetic wave generator for emitting electromagnetic waves to an interior of the reactor. Unwanted reaction products adhering to an inner surface of the reactor absorb electromagnetic waves are effectively removed.
    Type: Application
    Filed: February 18, 2004
    Publication date: August 18, 2005
    Applicant: ASM JAPAN K.K.
    Inventors: Chou Loke, Kenichi Kagami, Kiyoshi Satoh