Patents by Inventor Chris Atkinson

Chris Atkinson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9960541
    Abstract: A subsea connector includes a recess arranged on an inner surface of the housing of the subsea connector. The recess is configured to receive a canted coil spring such that it provides an electrical multi-point contact between an outer shielding layer, sometimes referred to as a screen, of a subsea cable. The subsea connector further includes a link configured to releasably attach an earth link wire to the housing.
    Type: Grant
    Filed: May 20, 2016
    Date of Patent: May 1, 2018
    Assignee: Siemens Aktiengesellschaft
    Inventors: Chris Atkinson, Wesley Barrett, Ross Carrington, Kevin Higgs, Mark Santos
  • Publication number: 20160365675
    Abstract: A subsea connector includes a recess arranged on an inner surface of the housing of the subsea connector. The recess is configured to receive a canted coil spring such that it provides an electrical multi-point contact between an outer shielding layer, sometimes referred to as a screen, of a subsea cable. The subsea connector further includes a link configured to releasably attach an earth link wire to the housing.
    Type: Application
    Filed: May 20, 2016
    Publication date: December 15, 2016
    Applicant: Siemens Aktiengesellschaft
    Inventors: Chris Atkinson, Wesley Barrett, Ross Carrington, Kevin Higgs, Mark Santos
  • Patent number: 7535417
    Abstract: A mobile device including a positioning device for determining position by timing analysis of received signals, the positioning device including a system for determining timing accuracy, the system including first signal generating means for continuously generating a first clock signal whilst the positioning device is inactive, second signal generating means for discontinuously generating a second clock signal during a plurality of spaced apart time periods, and accuracy determining means for determining the accuracy of the first clock signal using timing data from the second clock signal, the positioning device being arranged to determine position by use of the determined timing accuracy of the first clock.
    Type: Grant
    Filed: June 30, 2004
    Date of Patent: May 19, 2009
    Assignee: Nokia Corporation
    Inventor: Chris Atkinson
  • Publication number: 20070285309
    Abstract: A mobile device including a positioning device for determining position by timing analysis of received signals, the positioning device including a system for determining timing accuracy, the system including first signal generating means for continuously generating a first clock signal whilst the positioning device is inactive, second signal generating means for discontinuously generating a second clock signal during a plurality of spaced apart time periods, and accuracy determining means for determining the accuracy of the first clock signal using timing data from the second clock signal, the positioning device being arranged to determine position by use of the determined timing accuracy of the first clock.
    Type: Application
    Filed: June 30, 2004
    Publication date: December 13, 2007
    Applicant: NOKIA CORPORATION
    Inventor: Chris Atkinson
  • Publication number: 20070118300
    Abstract: A system and methods are described for the evaluation of the integrity of a wafer cassette and the disposition thereof based upon evaluation of wafer measurement data obtained using a wafer sorter cassette mapping system utilized in-line during wafer sorting operations. One method comprises initially placing two or more wafers into two or more of a plurality of slots in the wafer cassette. A wafer sorter cassette mapping sensor affixed to the wafer sorter is then scanned over the two or more wafers in the slots of the wafer cassette, using a wafer sorter. The positions of the wafers in the wafer cassette are then measured while scanning the sensor over the wafers. The wafer position measurements are then evaluated using a modeling system to determine slot positions within the cassette associated with the wafer position measurements, and a determination of the integrity of the cassette is generated based on the slot position determinations.
    Type: Application
    Filed: November 18, 2005
    Publication date: May 24, 2007
    Inventors: Kelly Mollenkopf, Chris Atkinson, Richard Guldi
  • Publication number: 20060078828
    Abstract: According to one embodiment of the present invention, a method of forming a semiconductor device includes forming a photoresist layer on a surface of a wafer. The wafer includes an array of die that includes a plurality of complete die and at least one partial edge die. The wafer has an edge that has a substantially rounded profile causing undersized patterns in semiconductor devices formed on partial edge die. A first exposure intensity is assigned to a first group of die on the surface of the wafer. The first group of die includes a group of complete die, and the first exposure intensity is assigned based at least in part on the location of the first group of die on the surface of the wafer. A second exposure intensity is assigned to a second group of die on the surface of the wafer. The second group of die includes at least one partial edge die. The second exposure intensity less than the first exposure intensity to compensate for reduced line width due to the wafer edge topography.
    Type: Application
    Filed: October 8, 2004
    Publication date: April 13, 2006
    Inventors: Chris Atkinson, Richard Guldi, Shangting Detweiler