Patents by Inventor Chris Baldwin

Chris Baldwin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140158414
    Abstract: A method and device include an organic multiple layer substrate having patterned conductors disposed on a recessed layer of the organic multiple layer substrate. A discrete component is coupled to the recessed layer such that the component is recessed from a top layer of the organic multiple layer substrate.
    Type: Application
    Filed: December 11, 2012
    Publication date: June 12, 2014
    Inventors: CHRIS BALDWIN, MIHIR K. ROY
  • Publication number: 20100006116
    Abstract: A hair styling apparatus including a magnetron and a styling base in communication with the magnetron for styling a moistened lock of hair is provided. A shield removably encases the styling base for shielding microwave radiation emitted from the magnetron. The lock of hair is heated upon activation of the magnetron. Methods of curling and straightening hair are also provided.
    Type: Application
    Filed: July 29, 2009
    Publication date: January 14, 2010
    Inventor: Chris Baldwin Bell
  • Patent number: 7586066
    Abstract: A hair styling apparatus including a magnetron and a styling base in communication with the magnetron for styling a moistened lock of hair is provided. A shield removably encases the styling base for shielding microwave radiation emitted from the magnetron. The lock of hair is heated upon activation of the magnetron. Methods of curling and straightening hair are also provided.
    Type: Grant
    Filed: November 17, 2006
    Date of Patent: September 8, 2009
    Inventor: Chris Baldwin Bell
  • Publication number: 20090116000
    Abstract: A fiber optic shape determination system having at least one optical fiber for placement within or along an elongated structure. The optical fiber defines an optical path for conveying an optical signal. The optical path manifests an interaction with the optical signal wherein the interaction occurs in a continuous fashion during the propagation of the optical signal along the optical path and produces a measurable response, the response conveying information about strain imparted to the optical fiber and a location along the optical fiber at which the strain occurs. The shape determination system also has a measurement component coupled to the optical fiber to sense the response and for determining the strain applied at different locations along the fiber and for deriving a shape of optic fiber, accordingly.
    Type: Application
    Filed: October 20, 2008
    Publication date: May 7, 2009
    Inventors: JASON KIDDY, Chris Baldwin, John Niemczuk
  • Publication number: 20050127489
    Abstract: A microelectronic device package including an electrically conductive lid having an attachment surface, a substrate having an attachment surface, at least one interconnect extending between the lid attachment surface and the substrate attachment surface, at least one microelectronic die disposed between the lid attachment surface and the substrate attachment surface, and the substrate having at least one first conductive trace extending between the electrically conductive first interconnect and the microelectronic die. The microelectronic device package allows for the use of the electrically conductive lid as a path for conducting signals (preferably power or ground) to and/or from a microelectronic die.
    Type: Application
    Filed: December 10, 2003
    Publication date: June 16, 2005
    Inventors: Debendra Mallik, Chris Baldwin, Brent Stone
  • Publication number: 20040241914
    Abstract: An electronic package includes an IC, such as a die, mounted onto one side of a thin interposer and a pin carrier mounted to an opposing side of the interposer. The pin carrier includes a cavity underneath the die. The cavity allows capacitors, or other electronic components, to be mounted against the interposer beneath the die. The cavity in the pin carrier is filled with an encapsulant to mechanically support the thin interposer in the area of the cavity during operation of an electronic system that includes the package.
    Type: Application
    Filed: July 2, 2004
    Publication date: December 2, 2004
    Applicant: Intel Corporation
    Inventor: Chris Baldwin
  • Patent number: 6784532
    Abstract: An integrated circuit including a die, a power terminal and a ground terminal all mounted onto a substrate. The power terminal including a body and a first extension projecting from the body, and the ground terminal including a body and a second extension projecting from the body. The second extension on the ground terminal being adjacent to the first extension on the power terminal to offset inductance that is generated by supplying current to the die through the power terminal.
    Type: Grant
    Filed: July 31, 2002
    Date of Patent: August 31, 2004
    Assignee: Intel Corporation
    Inventors: Dong Zhong, Farzaneh Yahyaei-Moayyed, David G. Figueroa, Chris Baldwin, Jiangqi He, Yuan-Liang Li
  • Patent number: 6777818
    Abstract: An electronic package includes an IC, such as a die, mounted onto one side of a thin interposer and a pin carrier mounted to an opposing side of the interposer. The pin carrier includes a cavity underneath the die. The cavity allows capacitors, or other electronic components, to be mounted against the interposer beneath the die. The cavity in the pin carrier is filled with an encapsulant to mechanically support the thin interposer in the area of the cavity during operation of an electronic system that includes the package.
    Type: Grant
    Filed: October 24, 2001
    Date of Patent: August 17, 2004
    Assignee: Intel Corporation
    Inventor: Chris Baldwin
  • Publication number: 20040021215
    Abstract: An integrated circuit including a die, a power terminal and a ground terminal all mounted onto a substrate. The power terminal including a body and a first extension projecting from the body, and the ground terminal including a body and a second extension projecting from the body. The second extension on the ground terminal being adjacent to the first extension on the power terminal to offset inductance that is generated by supplying current to the die through the power terminal.
    Type: Application
    Filed: July 31, 2002
    Publication date: February 5, 2004
    Applicant: Intel Corporation
    Inventors: Dong Zhong, Farzaneh Yahyaei-Moayyed, David G. Figueroa, Chris Baldwin, Jiangqi He, Yuan-Liang Li
  • Publication number: 20040022038
    Abstract: An electronic package, such as an integrated circuit package, includes a cavity (310, 410 FIGS. 3, 4) on the back side of the package, which is the same side on which connectors (304, 408, FIGS. 3, 4) to a next level of interconnect are located. Within the cavity are contacts (312, 412, FIGS. 3, 4), which enable one or more discrete capacitors (302, 402, FIGS. 3, 4) to be electrically connected to the package. The package provides a very low vertical inductance path between the capacitors and an integrated circuit (314, FIG. 3) mounted on the front side of the package.
    Type: Application
    Filed: July 31, 2002
    Publication date: February 5, 2004
    Applicant: Intel Corporation
    Inventors: David G. Figueroa, Chris Baldwin, Yuan-Liang Li
  • Publication number: 20030075787
    Abstract: An electronic package includes an IC, such as a die, mounted onto one side of a thin interposer and a pin carrier mounted to an opposing side of the interposer. The pin carrier includes a cavity underneath the die. The cavity allows capacitors, or other electronic components, to be mounted against the interposer beneath the die. The cavity in the pin carrier is filled with an encapsulant to mechanically support the thin interposer in the area of the cavity during operation of an electronic system that includes the package.
    Type: Application
    Filed: October 24, 2001
    Publication date: April 24, 2003
    Applicant: Intel Corporation
    Inventor: Chris Baldwin
  • Patent number: 6362438
    Abstract: The present invention provides a circuit board with a plated-through hole, wherein a first end of the plated-through hole is electrically attached to a cap formed of conductive material. One or more surface pads terminate on a surface layer of the printed circuit board, and are connected to the cap by one or more vias extending from the cap to the one or more surface pads. In some embodiments, the circuit board is a substrate for mounting an integrated circuit, such as a ball-grid array integrated circuit. The invention includes methods for making the novel circuit board, as well as integrated circuit assemblies comprising the novel circuit board with an integrated circuit mounted thereto.
    Type: Grant
    Filed: December 15, 1999
    Date of Patent: March 26, 2002
    Assignee: Intel Corporation
    Inventors: Tee Onn Chong, Chris Baldwin, Chee-Yee Chung
  • Patent number: 6220152
    Abstract: A barbeque rotisserie enclosure includes a hollow vessel for substantially releasably encapsulating food to be barbequed. The hollow vessel includes a hollow cylinder having a first closed end and a second open end the second open end for placing food into the hollow cylinder and the first closed end being permanently sealed with a first end cap. The second open end is releasably sealed with a second end cap; wherein the hollow vessel is capable of being rotated over a heat source. The barbeque rotisserie enclosure further includes a baffle housed concentrically within and adjacent to an inner surface of the hollow cylinder, thereby preventing direct contact of flames with the food and also substantially preventing direct contact of liquids emanating from the food with the heat source.
    Type: Grant
    Filed: December 21, 1999
    Date of Patent: April 24, 2001
    Inventors: Chris Baldwin, Mike Lobelio