Abstract: In one embodiment, a system comprises one or more processors, a first circuit assembly having a plurality of circuit traces, a second circuit assembly having a plurality of circuit traces, a cable assembly connecting the plurality of circuit traces on the first circuit assembly to the plurality of circuit traces on the second circuit assembly, signal generating circuitry to generate signal values on one or more of the plurality of circuit traces in the first circuit assembly, and a memory module communicatively connected to the one or more processors and comprising logic instructions which, when executed on the one or more processors configure the one or more processors to compare signal values on one or more of the plurality of circuit traces in the second circuit assembly to an expected signal value.