Abstract: A method of fabricating multiple gate lengths simultaneously on a single chip surface. Hard masking materials which are used as spacers in a field effects transistor generation process are converted into a spacer mask to increase the line density on the chip surface. These hard masking spacers are further patterned by either trimming or by enlarging a portion of a spacer at various locations on a chip surface, to enable formation of multiple gate lengths on a single chip, using a series of process steps which make use of combinations of hydrophobic and hydrophilic materials.

Abstract: A method of processing a substrate comprising depositing a layer comprising amorphous carbon on the substrate and then laser annealing the substrate is provided. Optionally, the layer further comprises a dopant selected from the group consisting of nitrogen, boron, phosphorus, fluorine, and combinations thereof. In one aspect, the layer comprising amorphous carbon is an anti-reflective coating and an absorber layer that absorbs electromagnetic radiation emitted by the laser and anneals a top surface layer of the substrate.

Abstract: A method of processing a substrate comprising depositing a layer comprising amorphous carbon on the substrate and then laser annealing the substrate is provided. Optionally, the layer further comprises a dopant selected from the group consisting of nitrogen, boron, phosphorus, fluorine, and combinations thereof. In one aspect, the layer comprising amorphous carbon is an anti-reflective coating and an absorber layer that absorbs electromagnetic radiation emitted by the laser and anneals a top surface layer of the substrate.

Abstract: A method of processing a substrate comprising depositing a layer comprising amorphous carbon on the substrate and then exposing the substrate to electromagnetic radiation have one or more wavelengths between about 600 nm and about 1000 nm under conditions sufficient to heat the layer to a temperature of at least about 300° C. is provided. Optionally, the layer further comprises a dopant selected from the group consisting of nitrogen, boron, phosphorus, fluorine, and combinations thereof. In one aspect, the layer comprising amorphous carbon is an anti-reflective coating and an absorber layer that absorbs the electromagnetic radiation and anneals a top surface layer of the substrate. In one aspect, the substrate is exposed to the electromagnetic radiation in a laser annealing process.

Abstract: A method and apparatus for reducing trapped charges in a semiconductor device having a first layer and a second layer, said method comprising the steps of providing said first layer, flowing a deposition, a dilution and a conversion gas upon said first layer thereby forming a transition layer, phasing out said flow of conversion gas and forming said second layer upon said transition layer. The deposition gas, dilution gas and conversion gas are preferably trimethylsilane, helium and N2O respectively. The method is performed via chemical vapor deposition or plasma enhanced chemical vapor deposition. The apparatus has a first insulating layer, a transition layer disposed upon said first layer and a second insulating layer disposed upon said transition layer. The transition layer improves the adhesion between said first insulating layer and said second insulating layer. A reduction in the amount of electrical charges (i.e.

Abstract: A method and apparatus for reducing trapped charges in a semiconductor device having a first layer and a second layer, said method comprising the steps of providing said first layer, flowing a deposition, a dilution and a conversion gas upon said first layer thereby forming a transition layer, phasing out said flow of conversion gas and forming said second layer upon said transition layer. The deposition gas, dilution gas and conversion gas are preferably trimethylsilane, helium and N2O respectively. The method is performed via chemical vapor deposition or plasma enhanced chemical vapor deposition. The apparatus has a first insulating layer, a transition layer disposed upon said first layer and a second insulating layer disposed upon said transition layer. The transition layer improves the adhesion between said first insulating layer and said second insulating layer. A reduction in the amount of electrical charges (i.e.