Patents by Inventor Chris Braun

Chris Braun has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9687892
    Abstract: A system and method for tailings disposal is disclosed. A coarse tailings feed stream and a coarse tailings crusher for crushing the coarse tailings feed stream is provided. A crushed coarse tailings stream may be produced by the coarse tailings crusher, and a disposal stream comprising the crushed coarse tailings stream may be discarded as geotechnically stable waste product. The system and method may further provide a fine tailings stream and a thickener configured to thicken/dewater the fine tailings stream and produce a thickener underflow fine tailings stream. The system and method may provide a mixer configured to mix the thickener underflow fine tailings stream and the crushed coarse tailings stream to form a combined tailings disposal stream. Dewatering apparatus may also be provided.
    Type: Grant
    Filed: May 5, 2014
    Date of Patent: June 27, 2017
    Assignee: FLSMIDH A/S
    Inventors: Chris Braun, Vishal Gupta, Timothy J. Laros, Todd Wisdom
  • Publication number: 20160107209
    Abstract: A system and method for tailings disposal is disclosed. A coarse tailings feed stream and a coarse tailings crusher for crushing the coarse tailings feed stream is provided. A crushed coarse tailings stream may be produced by the coarse tailings crusher, and a disposal stream comprising the crushed coarse tailings stream may be discarded as geotechnically stable waste product. The system and method may further provide a fine tailings stream and a thickener configured to thicken/dewater the fine tailings stream and produce a thickener underflow fine tailings stream. The system and method may provide a mixer configured to mix the thickener underflow fine tailings stream and the crushed coarse tailings stream to form a combined tailings disposal stream. Dewatering apparatus may also be provided.
    Type: Application
    Filed: May 5, 2014
    Publication date: April 21, 2016
    Inventors: Chris Braun, Vishal Gupta, Timothy J. Laros, Todd Wisdom
  • Patent number: 7550340
    Abstract: Semiconductor devices and memory cells are formed using silicon rich barrier layers to prevent diffusion of dopants from differently doped polysilicon films to overlying conductive layers or to substrates. A polycilicide gate electrode structure may be formed using the silicon rich barrier layers. Methods of forming the semiconductor devices and memory cells are also provided.
    Type: Grant
    Filed: May 14, 2008
    Date of Patent: June 23, 2009
    Assignee: Micron Technology, Inc.
    Inventors: Sanh Dang Tang, Chris Braun, Farrell M. Good
  • Publication number: 20080220572
    Abstract: Semiconductor devices and memory cells are formed using silicon rich barrier layers to prevent diffusion of dopants from differently doped polysilicon films to overlying conductive layers or to substrates. A polycilicide gate electrode structure may be formed using the silicon rich barrier layers. Methods of forming the semiconductor devices and memory cells are also provided.
    Type: Application
    Filed: May 14, 2008
    Publication date: September 11, 2008
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Sanh Dang Tang, Chris Braun, Farrell M. Good
  • Patent number: 7405447
    Abstract: Semiconductor devices and memory cells are formed using silicon rich barrier layers to prevent diffusion of dopants from differently doped polysilicon films to overlying conductive layers or to substrates. A polycilicide gate electrode structure may be formed using the silicon rich barrier layers. Methods of forming the semiconductor devices and memory cells are also provided.
    Type: Grant
    Filed: January 23, 2007
    Date of Patent: July 29, 2008
    Assignee: Micron Technology, Inc.
    Inventors: Sanh Dang Tang, Chris Braun, Farrell M. Good
  • Publication number: 20070117381
    Abstract: Semiconductor devices and memory cells are formed using silicon rich barrier layers to prevent diffusion of dopants from differently doped polysilicon films to overlying conductive layers or to substrates. A polycilicide gate electrode structure may be formed using the silicon rich barrier layers. Methods of forming the semiconductor devices and memory cells are also provided.
    Type: Application
    Filed: January 23, 2007
    Publication date: May 24, 2007
    Applicant: Micron Technology, Inc.
    Inventors: Sanh Tang, Chris Braun, Farrell Good
  • Patent number: 7211479
    Abstract: Semiconductor devices and memory cells are formed using silicon rich barrier layers to prevent diffusion of dopants from differently doped polysilicon films to overlying conductive layers or to substrates. A polycilicide gate electrode structure may be formed using the silicon rich barrier layers. Methods of forming the semiconductor devices and memory cells are also provided.
    Type: Grant
    Filed: May 9, 2006
    Date of Patent: May 1, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Sanh Dang Tang, Chris Braun, Farrell M. Good
  • Publication number: 20060205135
    Abstract: Semiconductor devices and memory cells are formed using silicon rich barrier layers to prevent diffusion of dopants from differently doped polysilicon films to overlying conductive layers or to substrates. A polycilicide gate electrode structure may be formed using the silicon rich barrier layers. Methods of forming the semiconductor devices and memory cells are also provided.
    Type: Application
    Filed: May 9, 2006
    Publication date: September 14, 2006
    Inventors: Sanh Tang, Chris Braun, Farrell Good
  • Patent number: 7071049
    Abstract: Semiconductor devices and memory cells are formed using silicon rich barrier layers to prevent diffusion of dopants from differently doped polysilicon films to overlying conductive layers or to substrates. A polycilicide gate electrode structure may be formed using the silicon rich barrier layers. Methods of forming the semiconductor devices and memory cells are also provided.
    Type: Grant
    Filed: August 30, 2004
    Date of Patent: July 4, 2006
    Assignee: Micron Technology, Inc.
    Inventors: Sanh Dang Tang, Chris Braun, Farrell M. Good
  • Patent number: 6903425
    Abstract: Semiconductor devices and memory cells are formed using silicon rich barrier layers to prevent diffusion of dopants from differently doped polysilicon films to overlying conductive layers or to substrates. A polycilicide gate electrode structure may be formed using the silicon rich barrier layers. Methods of forming the semiconductor devices and memory cells are also provided. It is emphasized that this abstract is provided to comply with the rules requiring an abstract which will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that is will not be used to interpret or limit the scope or meaning of the claims. 37 CFR 1.72(b).
    Type: Grant
    Filed: August 5, 2002
    Date of Patent: June 7, 2005
    Assignee: Micron Technology, Inc.
    Inventors: Sanh Dang Tang, Chris Braun, Farrell M. Good
  • Publication number: 20050026378
    Abstract: Semiconductor devices and memory cells are formed using silicon rich barrier layers to prevent diffusion of dopants from differently doped polysilicon films to overlying conductive layers or to substrates. A polycilicide gate electrode structure may be formed using the silicon rich barrier layers. Methods of forming the semiconductor devices and memory cells are also provided.
    Type: Application
    Filed: August 30, 2004
    Publication date: February 3, 2005
    Inventors: Sanh Tang, Chris Braun, Farrell Good
  • Publication number: 20040023474
    Abstract: Semiconductor devices and memory cells are formed using silicon rich barrier layers to prevent diffusion of dopants from differently doped polysilicon films to overlying conductive layers or to substrates. A polycilicide gate electrode structure may be formed using the silicon rich barrier layers. Methods of forming the semiconductor devices and memory cells are also provided. It is emphasized that this abstract is provided to comply with the rules requiring an abstract which will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that is will not be used to interpret or limit the scope or meaning of the claims. 37 CFR 1.72(b).
    Type: Application
    Filed: August 5, 2002
    Publication date: February 5, 2004
    Inventors: Sanh Dang Tang, Chris Braun, Farrell M. Good