Patents by Inventor Chris Bueb

Chris Bueb has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Apparatuses, systems, devices, and methods of replacing at least partially non-functional portions of memory
    Patent number: 9165688
    Abstract: Subject matter disclosed herein relates to determining that a portion of a memory is at least partially non-functional, replacing the portion of at least partially non-functional memory; and adjusting an error detection and/or correction process responsive to determining that the portion of the memory is at least partially non-functional and/or replacing the portion of at least partially non-functional memory.
    Type: Grant
    Filed: August 7, 2014
    Date of Patent: October 20, 2015
    Assignee: Micron Technology, Inc.
    Inventors: Chris Bueb, Sean Eilert
  • APPARATUSES, SYSTEMS, DEVICES, AND METHODS OF REPLACING AT LEAST PARTIALLY NON-FUNCTIONAL PORTIONS OF MEMORY
    Publication number: 20140351630
    Abstract: Subject matter disclosed herein relates to determining that a portion of a memory is at least partially non-functional, replacing the portion of at least partially non-functional memory; and adjusting an error detection and/or correction process responsive to determining that the portion of the memory is at least partially non-functional and/or replacing the portion of at least partially non-functional memory.
    Type: Application
    Filed: August 7, 2014
    Publication date: November 27, 2014
    Inventors: Chris Bueb, Sean Eilert
  • Apparatuses, systems, devices, and methods of replacing at least partially non-functional portions of memory
    Patent number: 8806303
    Abstract: Subject matter disclosed herein relates to determining that a portion of a memory is at least partially non-functional, replacing the portion of at least partially non-functional memory; and adjusting an error detection and/or correction process responsive to determining that the portion of the memory is at least partially non-functional and/or replacing the portion of at least partially non-functional memory.
    Type: Grant
    Filed: October 16, 2013
    Date of Patent: August 12, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Chris Bueb, Sean Eilert
  • Signal line to indicate program-fail in memory
    Patent number: 8683270
    Abstract: Subject matter disclosed herein relates to a memory device and a method of operating same.
    Type: Grant
    Filed: April 29, 2010
    Date of Patent: March 25, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Chris Bueb, Poorna Kale
  • APPARATUSES, SYSTEMS, DEVICES, AND METHODS OF REPLACING AT LEAST PARTIALLY NON-FUNCTIONAL PORTIONS OF MEMORY
    Publication number: 20140047283
    Abstract: Subject matter disclosed herein relates to determining that a portion of a memory is at least partially non-functional, replacing the portion of at least partially non-functional memory; and adjusting an error detection and/or correction process responsive to determining that the portion of the memory is at least partially non-functional and/or replacing the portion of at least partially non-functional memory.
    Type: Application
    Filed: October 16, 2013
    Publication date: February 13, 2014
    Applicant: Micron Technology Inc.
    Inventors: Chris Bueb, Sean Eilert
  • Enhanced addressability for serial non-volatile memory
    Patent number: 8607028
    Abstract: A method and a memory device are provided for accessing a storage location. The method includes storing an extended address value in a register in a non-volatile memory device. The method further includes subsequently receiving multiple addresses and combining the stored extended address value with each of the multiple received addresses to produce multiple combined addresses. The method further includes accessing multiple storage locations within the non-volatile memory device based, at least in part, on the multiple combined addresses.
    Type: Grant
    Filed: December 30, 2008
    Date of Patent: December 10, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Poorna Kale, Chris Bueb, Tommaso Zerilli, Raffaele Bufano, Sandra Lospalluti, Marco Gibilaro
  • Apparatuses, systems, devices, and methods of replacing at least partially non-functional portions of memory
    Patent number: 8572466
    Abstract: Subject matter disclosed herein relates to determining that a portion of a memory is at least partially non-functional, replacing the portion of at least partially non-functional memory; and adjusting an error detection and/or correction process responsive to determining that the portion of the memory is at least partially non-functional and/or replacing the portion of at least partially non-functional memory.
    Type: Grant
    Filed: June 6, 2011
    Date of Patent: October 29, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Chris Bueb, Sean Eilert
  • Extended address mode for serial flash memory
    Patent number: 8380914
    Abstract: Example embodiments for providing enhanced addressability for a serial flash memory device may comprise providing an extended addressing mode to enable access to a larger range of memory locations.
    Type: Grant
    Filed: December 31, 2008
    Date of Patent: February 19, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Poorna Kale, Chris Bueb, Todd Legler
  • APPARATUSES, SYSTEMS, DEVICES, AND METHODS OF REPLACING AT LEAST PARTIALLY NON-FUNCTIONAL PORTIONS OF MEMORY
    Publication number: 20120311393
    Abstract: Subject matter disclosed herein relates to determining that a portion of a memory is at least partially non-functional, replacing the portion of at least partially non-functional memory; and adjusting an error detection and/or correction process responsive to determining that the portion of the memory is at least partially non-functional and/or replacing the portion of at least partially non-functional memory.
    Type: Application
    Filed: June 6, 2011
    Publication date: December 6, 2012
    Applicant: Micron Technology, Inc.
    Inventors: Chris Bueb, Sean Eilert
  • ENHANCED ADDRESSABILITY FOR SERIAL NON-VOLATILE MEMORY
    Publication number: 20120011304
    Abstract: Example embodiments for providing enhanced addressability for a serial non-volatile memory device may comprise accessing a storage location based, at least in part, on an extended address value and an address, the extended address value to identify a subset of storage locations from a plurality of storage locations, the address to identify the storage location within the subset of storage locations.
    Type: Application
    Filed: December 30, 2008
    Publication date: January 12, 2012
    Inventors: Poorna Kale, Chris Bueb, Tommaso Zerilli, Raffaele Bufano, Sandra Lospalluti, Marco Gibilaro
  • SIGNAL LINE TO INDICATE PROGRAM-FAIL IN MEMORY
    Publication number: 20110271165
    Abstract: Subject matter disclosed herein relates to a memory device and a method of operating same.
    Type: Application
    Filed: April 29, 2010
    Publication date: November 3, 2011
    Inventors: Chris Bueb, Poorna Kale
  • Configurable latching for asynchronous memories
    Patent number: 7916575
    Abstract: A memory, such as a flash memory, may receive a configuration bit from a memory controller to set the memory in one of two selectable modes. Thus, based on the way the memory controller operates, it can adapt the operation of the memory to suit the memory controller's techniques for entering synchronous burst read mode. In some embodiments, the bit may selectively enable the memory to assume one of two synchronous burst read modes which are based on different arrangements of CLK and ADV# signals.
    Type: Grant
    Filed: December 23, 2008
    Date of Patent: March 29, 2011
    Inventors: Emanuele Confalonieri, Daniele Balluchi, Chris Bueb, Graziano Mirichigni
  • Configurable Latching for Asynchronous Memories
    Publication number: 20100157718
    Abstract: A memory, such as a flash memory, may receive a configuration bit from a memory controller to set the memory in one of two selectable modes. Thus, based on the way the memory controller operates, it can adapt the operation of the memory to suit the memory controller's techniques for entering synchronous burst read mode. In some embodiments, the bit may selectively enable the memory to assume one of two synchronous burst read modes which are based on different arrangements of CLK and ADV# signals.
    Type: Application
    Filed: December 23, 2008
    Publication date: June 24, 2010
    Inventors: Emanuele Confalonieri, Daniele Balluchi, Chris Bueb, Graziano Mirichigini