Abstract: A trench MOS-gated device has an upper surface and includes a substrate having an upper layer of doped monocrystalline semiconductor material of a first conduction type. A gate trench in the upper layer has sidewalls and a floor lined with a first dielectric material and a centrally disposed core formed of a second dielectric material extending upwardly from the first dielectric material on the trench floor and having lateral and top surfaces. The remainder of the trench is substantially filled with a conductive material that encompasses and contacts the lateral and top surfaces of the core of second dielectric material. A doped well region of a second conduction type overlies a drain zone of the first conduction type in the upper layer, and a heavily doped source region of the first conduction type contiguous to the gate trench and a heavily doped body region of the second conduction type are disposed in the well region at the upper surface of the device.

Abstract: A trench MOS-gated device has an upper surface and includes a substrate having an upper layer of doped monocrystalline semiconductor material of a first conduction type. A gate trench in the upper layer has sidewalls and a floor lined with a first dielectric material and a centrally disposed core formed of a second dielectric material extending upwardly from the first dielectric material on the trench floor and having lateral and top surfaces. The remainder of the trench is substantially filled with a conductive material that encompasses and contacts the lateral and top surfaces of the core of second dielectric material. A doped well region of a second conduction type overlies a drain zone of the first conduction type in the upper layer, and a heavily doped source region of the first conduction type contiguous to the gate trench and a heavily doped body region of the second conduction type are disposed in the well region at the upper surface of the device.