Abstract: The invention provides thermally enhanced BGAs and methods for their fabrication with a ground ring suitable for operably coupling to either the frontside or backside, or both, of an IC chip mounted on a substrate. The methods and devices of the invention disclosed include the fabrication of a ground ring on the surface of a BGA substrate prepared for receiving the frontside of the chip. A heat spreader has ground ring corresponding to substrate round ring and is attached at the backside of the chip with a conductive material. A conductive material is interposed between the heat spreader and substrate ground rings, electrically coupling them. Thus, the backside of the chip may be electrically connected to the ground ring as well as, or instead of, the frontside.

Abstract: The invention provides thermally enhanced BGAs and methods for their fabrication with a ground ring suitable for operably coupling to either the frontside or backside, or both, of an IC chip mounted on a substrate. The methods and devices of the invention disclosed include the fabrication of a ground ring on the surface of a BGA substrate prepared for receiving the frontside of the chip. A heat spreader has ground ring corresponding to substrate round ring and is attached at the backside of the chip with a conductive material. A conductive material is interposed between the heat spreader and substrate ground rings, electrically coupling them. Thus, the backside of the chip may be electrically connected to the ground ring as well as, or instead of, the frontside.

Abstract: According to one or more aspects of the present invention, a flip chip BGA packaging or mounting arrangement is disclosed where a grounding connection of implemented on the back of the chip. The grounding connection comprises one or more metal strips that are situated between the back of the chip and a printed circuit board upon which the chip is operatively coupled via BGA, or between that back of the chip and a heat spreader that is itself operatively coupled to the printed circuit board. The backside grounding connection enhances stability in switching applications, for example, particularly where the chip includes silicon on insulator (SOI) wafer processing.

Abstract: A semiconductor device comprising a metallic leadframe (103) with a first surface (103a) and a second surface (103b). The leadframe includes a chip pad (104) and a plurality of segments (107); the chip pad is held by a plurality of straps (105), wherein each strap has a groove (106). A chip (101) is mounted on the chip pad and electrically connected to the segments. A heat spreader (110) is disposed on the first surface of the leadframe; the heat spreader has its central portion (110a) spaced above the chip connections (108), and also has positioning members (110b) extending outwardly from the edges of the central portion so that they rest in the grooves of the straps. Encapsulation material surrounds the chip, the electrical connections, and the spreader positioning members, and fills the space between the spreader and the chip, while leaving the second leadframe surface and the central spreader portion exposed.

Abstract: A semiconductor device comprising a metallic leadframe (103) with a first surface (103a) and a second surface (103b). The leadframe includes a chip pad (104) and a plurality of segments (107); the chip pad is held by a plurality of straps (105), wherein each strap has a groove (106). A chip (101) is mounted on the chip pad and electrically connected to the segments. A heat spreader (110) is disposed on the first surface of the leadframe; the heat spreader has its central portion (110a) spaced above the chip connections (108), and also has positioning members (110b) extending outwardly from the edges of the central portion so that they rest in the grooves of the straps. Encapsulation material surrounds the chip, the electrical connections, and the spreader positioning members, and fills the space between the spreader and the chip, while leaving the second leadframe surface and the central spreader portion exposed.

Abstract: A semiconductor device comprising a metallic leadframe (103) with a first surface (103a) and a second surface (103b). The leadframe includes a chip pad (104) and a plurality of segments (107); the chip pad is held by a plurality of straps (105), wherein each strap has a groove (106). A chip (101) is mounted on the chip pad and electrically connected to the segments. A heat spreader (110) is disposed on the first surface of the leadframe; the heat spreader has its central portion (110a) spaced above the chip connections (108), and also has positioning members (110b) extending outwardly from the edges of the central portion so that they rest in the grooves of the straps. Encapsulation material surrounds the chip, the electrical connections, and the spreader positioning members, and fills the space between the spreader and the chip, while leaving the second leadframe surface and the central spreader portion exposed.

Abstract: A method for assembling a whole semiconductor wafer (101) with a plurality of device units (120) having metal contact pads. Each contact pad has a patterned barrier metal layer and a metal stud (103, preferably copper or nickel) with an outer surface suitable to form metallurgical bonds without melting. A leadframe suitable for the whole wafer is provided, which has a plurality of segments groups (102), each group suitable for one device unit; each segment has first (102a) and second ends (102b) covered by solderable metal. A predetermined amount of solder paste (104) is placed on each of the first segment ends. The leadframe is then aligned with the wafer so that each of the paste-covered segment ends is aligned with the corresponding metal stud of the respective device unit. The leadframe is connected to the wafer and the whole wafer is encapsulated (105) so that the device units and the first segment ends are covered, while the second segment ends remain exposed.