Abstract: A method of identifying pseudo-invariant instructions in computer program hot paths, comprising the steps of creating an intermediate representation of a hot path in a software buffer, executing instructions in the program image for the computer program until a hot path is detected, copying computer machine state and computer processor register contents to a context in memory, and using this context to compute an output a plurality of times for each instruction in the hot path using an interpreter that emulates the computer processor. Results of the interpreter computations are stored with the frequency count for each unique output in a table that is readable by a program optimizer. Frequency counts for each instruction are compared with a pseudo-invariant threshold to classify an instruction as pseudo-invariant.

Abstract: A method of identifying pseudo-invariant instructions in computer program hot paths, comprising the steps of creating an intermediate representation of a hot path in a software buffer, executing instructions in the program image for the computer program until a hot path is detected, copying computer machine state and computer processor register contents to a context in memory, and using this context to compute an output a plurality of times for each instruction in the hot path using an interpreter that emulates the computer processor. Results of the interpreter computations are stored with the frequency count for each unique output in a table that is readable by a program optimizer. Frequency counts for each instruction are compared with a pseudo-invariant threshold to classify an instruction as pseudo-invariant.

Abstract: A method of debugging a dynamic computer program optimizer beginning with creating two copies of the contents of the registers in a computer processor. One copy is loaded into pseudo-registers and the other is saved for a verification test. A test sequence comprising an intermediate representation of a program hot path is loaded in a software buffer and executed. Register and memory read and write commands in the test sequence are executed with the pseudo-registers and a memory buffer. The second copy of the register contents are then loaded back to the processor registers. The program hot path is executed and register and memory read and write commands are executed with the processor registers and system memory. The contents of the registers and memories are compared and if the contents match, the test sequence is valid. The test sequence may also comprise a translated copy of the program hot path.