Abstract: A method and system for migrating at least one critical resource during a migration of an operative portion of a computer system are disclosed. In at least some embodiments, the method includes (a) sending first information constituting a substantial copy of a first of the at least one critical resource via at least one intermediary between a source component and a destination component. The method further includes (b) transitioning a status of the destination component from being incapable of receiving requests to being capable of receiving requests, and (c) re-programming an abstraction block to include modified addresses so that at least one incoming request signal is forwarded to the destination component rather than to the source component.

Abstract: A system and method for achieving one or more protected regions within a computer system having multiple partitions are disclosed. In at least some embodiments, the system includes an intermediary device for use within the computer system having the multiple partitions. The intermediary device includes a fabric device, and a first firewall device capable of limiting communication of a signal based upon at least one of a source of the signal and an intended destination of the signal, the first firewall device being at least indirectly coupled to the fabric device. The intermediary device further includes a first conversion device that is one of integrated with the first firewall device and distinct from the first firewall device, and that is capable of converting between a processor address and a fabric address for use by the fabric device. In some embodiments, the various devices each include Control and Status Registers (CSRs).

Abstract: One exemplary method of assigning addresses in two or more address spaces with address fields of different lengths comprises defining address types, assigning a value to first bits at the high ends of the address fields to identify a first said address type, assigning second bits at the low ends of the address fields to identify addresses of the first said address type, and inserting different numbers of additional bits between the first bits and the second bits in the two or more address spaces.

Abstract: A method and system for handling interrupts within a computer system during hardware resource migration are disclosed. In at least some embodiments, the method includes (a) programming an address conversion component so that incoming interrupt signals are directed to a control component rather than to a source processing resource, and (b) accumulating the incoming interrupt signals at the control component. Additionally the method also includes, subsequent to the migration of the partition from the source processing resource to a destination processing resource, (c) sending the accumulated incoming interrupt signals to the destination processing resource, and (d) reprogramming the address conversion component so that further incoming interrupt signals are directed to the destination processing resource.

Abstract: A method and system for migrating at least one critical resource during a migration of an operative portion of a computer system are disclosed. In at least some embodiments, the method includes (a) sending first information constituting a substantial copy of a first of the at least one critical resource via at least one intermediary between a source component and a destination component. The method further includes (b) transitioning a status of the destination component from being incapable of receiving requests to being capable of receiving requests, and (c) re-programming an abstraction block to include modified addresses so that at least one incoming request signal is forwarded to the destination component rather than to the source component.

Abstract: A method and system for handling interrupts within a computer system during hardware resource migration are disclosed. In at least some embodiments, the method includes (a) programming an address conversion component so that incoming interrupt signals are directed to a control component rather than to a source processing resource, and (b) accumulating the incoming interrupt signals at the control component. Additionally the method also includes, subsequent to the migration of the partition from the source processing resource to a destination processing resource, (c) sending the accumulated incoming interrupt signals to the destination processing resource, and (d) reprogramming the address conversion component so that further incoming interrupt signals are directed to the destination processing resource.

Abstract: A system and method for achieving one or more protected regions within a computer system having multiple partitions are disclosed. In at least some embodiments, the system includes an intermediary device for use within the computer system having the multiple partitions. The intermediary device includes a fabric device, and a first firewall device capable of limiting communication of a signal based upon at least one of a source of the signal and an intended destination of the signal, the first firewall device being at least indirectly coupled to the fabric device. The intermediary device further includes a first conversion device that is one of integrated with the first firewall device and distinct from the first firewall device, and that is capable of converting between a processor address and a fabric address for use by the fabric device. In some embodiments, the various devices each include Control and Status Registers (CSRs).

Abstract: A system comprises a plurality of computing nodes and a plurality of separate memory devices. A separate memory device is associated with each computing node. The separate memory devices are configured as partition memory in which memory accesses are interleaved across multiple of such memory devices. A protected portion of the partition memory is reserved for use by complex management (CM) code that coordinates partitions implemented on the system. The protected portion of partition memory is restricted from access by operating systems running in the partitions.

Abstract: A system comprises a plurality of computing nodes and a plurality of separate memory devices. A separate memory device is associated with each computing node. The separate memory devices are configured as partition memory in which memory accesses are interleaved across multiple of such memory devices. A protected portion of the partition memory is reserved for use by complex management (CM) code that coordinates partitions implemented on the system. The protected portion of partition memory is restricted from access by operating systems running in the partitions.

Abstract: One exemplary method of assigning addresses in two or more address spaces with address fields of different lengths comprises defining address types, assigning a value to first bits at the high ends of the address fields to identify a first said address type, assigning second bits at the low ends of the address fields to identify addresses of the first said address type, and inserting different numbers of additional bits between the first bits and the second bits in the two or more address spaces.