Patents by Inventor Chris Nga Yee Yip
Chris Nga Yee Yip has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10734079Abstract: The disclosure relates in some aspects to a read scrub design for a non-volatile memory that includes a block comprising N wordlines partitioned into a first sub-block comprising a first subset of the N wordlines and a second sub-block comprising a second subset of the N wordlines different than the first subset. In some aspects, the disclosure relates to detecting a trigger event associated with a read command performed on the first sub-block. A target sub-block test is then performed in response to a detection of the trigger event to determine whether to add the first sub-block to a read scrub queue. If the first sub-block is added to the read scrub queue, a sister sub-block test is then performed to determine whether to add the second sub-block to the read scrub queue.Type: GrantFiled: May 17, 2019Date of Patent: August 4, 2020Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.Inventors: Srinivasan Seetharaman, Sourabh Sankule, Piyush Girish Sagdeo, Gautam Ashok Dusija, Chris Nga Yee Yip
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Patent number: 10635585Abstract: In an on-chip copy process, performed by a storage device, data is copied from a plurality of Single Level Cell (SLC) blocks of non-volatile three-dimensional memory (e.g., 3D flash memory) in a respective memory die to a Multilevel Cell (MLC) block of the same memory die. A copy of source data from a respective SLC block is interleaved with a copy of source data from one or more other SLC blocks in the memory die to produce interleaved source data. Each source data copy that is interleaved is rotated by an offset assigned to the respective SLC block from which the source data is copied, and each respective SLC block in the plurality of SLC blocks is assigned a distinct offset. Each distinct set of the interleaved source data is written to a distinct respective MLC page of the MLC block.Type: GrantFiled: June 15, 2018Date of Patent: April 28, 2020Assignee: Western Digital Technologies, Inc.Inventors: Abhilash R. Kashyap, Gautam A. Dusija, Deepak Raghu, Chris Nga Yee Yip
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Publication number: 20190354478Abstract: In an on-chip copy process, performed by a storage device, data is copied from a plurality of Single Level Cell (SLC) blocks of non-volatile three-dimensional memory (e.g., 3D flash memory) in a respective memory die to a Multilevel Cell (MLC) block of the same memory die. A copy of source data from a respective SLC block is interleaved with a copy of source data from one or more other SLC blocks in the memory die to produce interleaved source data. Each source data copy that is interleaved is rotated by an offset assigned to the respective SLC block from which the source data is copied, and each respective SLC block in the plurality of SLC blocks is assigned a distinct offset. Each distinct set of the interleaved source data is written to a distinct respective MLC page of the MLC block.Type: ApplicationFiled: June 15, 2018Publication date: November 21, 2019Inventors: Abhilash R. Kashyap, Gautam A. Dusija, Deepak Raghu, Chris Nga Yee Yip
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Patent number: 10102920Abstract: A storage device with a memory may utilize an optimized read retry operation. A read retry table includes a number of read retry cases with updated read thresholds. The read thresholds in the read retry table may be used to avoid errors caused by shifting of charge levels. The optimization of read retry includes weighting or reordering of the read retry cases in the read retry table. The selection of a read retry case (and corresponding read thresholds) are determined based on the weighting or reordering.Type: GrantFiled: August 15, 2016Date of Patent: October 16, 2018Assignee: SanDisk Technologies LLCInventors: Philip Reusswig, Deepak Raghu, Zelei Guo, Chris Nga Yee Yip
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Patent number: 10026483Abstract: Techniques disclosed herein cope with cross-temperature effects in non-volatile memory systems. One technology disclosed herein includes an apparatus and method that scrubs a block of non-volatile memory cells responsive to a determination that variance in word line program temperatures in the block exceeds a threshold. Such blocks having large variance in programming temperatures for different word lines can potentially have high BERs when reading. This may be due to the difficulty in having one set of read levels that are optimum for all word lines in the block.Type: GrantFiled: June 28, 2017Date of Patent: July 17, 2018Assignee: Western Digital Technologies, Inc.Inventors: Grishma Shah, Philip David Reusswig, Chris Nga Yee Yip, Nian Niles Yang
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Patent number: 10007311Abstract: A storage device with a memory may modify throttling to reduce cross temperature effects. The decision to throttle may be based on a memory device temperature (i.e. temperature throttling) or may be based on the memory device's health, usage, or performance (e.g. hot count or bit error rate). Temperature throttling may be implemented that considers the memory device's health, usage, or performance (e.g. hot count or bit error rate). Likewise, throttling based on the memory device's health, usage, or performance may utilize the memory device's temperature to optimize throttling time. For example, a test mode matrix (TMM) may be modified to depend on temperature.Type: GrantFiled: August 15, 2016Date of Patent: June 26, 2018Assignee: SanDisk Technologies LLCInventors: Deepak Raghu, Pao-Ling Koh, Philip Reusswig, Chris Nga Yee Yip, Jun Wan, Yan Li
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Publication number: 20180046527Abstract: A storage device with a memory may utilize an optimized read retry operation. A read retry table includes a number of read retry cases with updated read thresholds. The read thresholds in the read retry table may be used to avoid errors caused by shifting of charge levels. The optimization of read retry includes weighting or reordering of the read retry cases in the read retry table. The selection of a read retry case (and corresponding read thresholds) are determined based on the weighting or reordering.Type: ApplicationFiled: August 15, 2016Publication date: February 15, 2018Applicant: SanDisk Technologies LLCInventors: Philip Reusswig, Deepak Raghu, Zelei Guo, Chris Nga Yee Yip
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Publication number: 20180046231Abstract: A storage device with a memory may modify throttling to reduce cross temperature effects. The decision to throttle may be based on a memory device temperature (i.e. temperature throttling) or may be based on the memory device's health, usage, or performance (e.g. hot count or bit error rate). Temperature throttling may be implemented that considers the memory device's health, usage, or performance (e.g. hot count or bit error rate). Likewise, throttling based on the memory device's health, usage, or performance may utilize the memory device's temperature to optimize throttling time. For example, a test mode matrix (TMM) may be modified to depend on temperature.Type: ApplicationFiled: August 15, 2016Publication date: February 15, 2018Applicant: SanDisk Technologies LLCInventors: Deepak Raghu, Pao-Ling Koh, Philip Reusswig, Chris Nga Yee Yip, Jun Wan, Yan Li
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Patent number: 9837146Abstract: Systems, methods and/or devices are used to adjust a read property for a memory portion of non-volatile memory. In one aspect, in response to receiving a program request, the device: detects a first temperature of the memory portion; and stores first temperature data corresponding to the detected first temperature. In response to receiving a read request, the device performs an adjustment determination, including: detecting a second temperature of the memory portion of the non-volatile memory, retrieving the stored first temperature data, and determining, in accordance with the detected second temperature and the retrieved first temperature data, whether to perform the read using an adjusted read property. In accordance with a determination to perform the read using the adjusted read property, the device performs a read on the memory portion using the adjusted read property.Type: GrantFiled: June 28, 2016Date of Patent: December 5, 2017Assignee: SanDisk Technologies LLCInventors: Nian Niles Yang, Chris Nga Yee Yip
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Publication number: 20170200492Abstract: Systems, methods and/or devices are used to adjust a read property for a memory portion of non-volatile memory. In one aspect, in response to receiving a program request, the device: detects a first temperature of the memory portion; and stores first temperature data corresponding to the detected first temperature. In response to receiving a read request, the device performs an adjustment determination, including: detecting a second temperature of the memory portion of the non-volatile memory, retrieving the stored first temperature data, and determining, in accordance with the detected second temperature and the retrieved first temperature data, whether to perform the read using an adjusted read property. In accordance with a determination to perform the read using the adjusted read property, the device performs a read on the memory portion using the adjusted read property.Type: ApplicationFiled: June 28, 2016Publication date: July 13, 2017Inventors: Nian Niles Yang, Chris Nga Yee Yip