Patents by Inventor Chris Norrie

Chris Norrie has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7006518
    Abstract: A method and apparatus for scheduling static and dynamic traffic through a switch fabric are described. The method comprises for each switch slice in a distributed switch fabric, scheduling static traffic by reserving time slots for transmission of the static traffic to at least one destination, and scheduling dynamic traffic so as not to be transmitting the dynamic traffic to the at least one destination during the reserved time slots. The apparatus implements the method and comprises a memory storing a schedule of static traffic, shifters storing dynamic traffic scheduling requests, and a grant scheduler.
    Type: Grant
    Filed: May 25, 2001
    Date of Patent: February 28, 2006
    Assignee: Integrated Device Technology, Inc.
    Inventors: Matthew D. Ornes, Gene K. Chui, Chris Norrie
  • Patent number: 6993028
    Abstract: An apparatus and method for reordering sequence indicated information units into proper sequence are described. The apparatus includes a double-back shifter receiving sequence indicated information units, and at least one circuit coupled to the double-back shifter to repetitively compare, reorder and shift the sequence indicated information units so as to be in proper sequence when shifted out of the double-back shifter. The method includes repetitively comparing, reordering and shifting sequence indicated information units in a double-back shifter so as to be in proper sequence when shifted out of the double-back shifter.
    Type: Grant
    Filed: July 13, 2001
    Date of Patent: January 31, 2006
    Assignee: Integrated Device Technology, Inc.
    Inventors: Matthew D. Ornes, Gene K. Chui, Chris Norrie
  • Publication number: 20030012199
    Abstract: An apparatus and method for reordering sequence indicated information units into proper sequence are described. The apparatus includes a double-back shifter receiving sequence indicated information units, and at least one circuit coupled to the double-back shifter to repetitively compare, reorder and shift the sequence indicated information units so as to be in proper sequence when shifted out of the double-back shifter. The method includes repetitively comparing, reordering and shifting sequence indicated information units in a double-back shifter so as to be in proper sequence when shifted out of the double-back shifter.
    Type: Application
    Filed: July 13, 2001
    Publication date: January 16, 2003
    Inventors: Matthew D. Ornes, Gene K. Chui, Chris Norrie
  • Publication number: 20020176428
    Abstract: A method and apparatus for scheduling static and dynamic traffic through a switch fabric are described. The method comprises for each switch slice in a distributed switch fabric, scheduling static traffic by reserving time slots for transmission of the static traffic to at least one destination, and scheduling dynamic traffic so as not to be transmitting the dynamic traffic to the at least one destination during the reserved time slots. The apparatus implements the method and comprises a memory storing a schedule of static traffic, shifters storing dynamic traffic scheduling requests, and a grant scheduler.
    Type: Application
    Filed: May 25, 2001
    Publication date: November 28, 2002
    Inventors: Matthew D. Ornes, Gene K. Chui, Chris Norrie
  • Patent number: 5517514
    Abstract: A data integrity system comprising a plurality of units connected together for the transfer of data between the units. Each said unit comprises data means for receiving data from one or more other units and/or transmitting data to one or more other units, first means, if the unit transmits data to other units, for generating a PARITY OUT signal indicating the parity of all data transmitted to the other units and second means, if the unit is to receive data from other units, for generating a PARITY IN signal indicating the parity of all data being received by the unit from the other units. A third means, located in one of said plurality of units, receives all the PARITY OUT signals and all the PARITY IN signals generated by the plurality of units and detects from all the received PARITY IN signals and all the PARITY OUT signals whether an error had occurred during the transfer of data between the units.
    Type: Grant
    Filed: July 7, 1994
    Date of Patent: May 14, 1996
    Assignee: Amdahl Corporation
    Inventors: Chris Norrie, Luis Ancajas, Carolee Newcomb, Allan Zmyslowski
  • Patent number: 5426783
    Abstract: A processing system comprising a first means for generating first signals indicating when the next instruction can begin processing where eight or less bytes are processed by the MOVE, PACK or UNPACK instruction, a second means for generating second signals if an overlap condition exists for the MOVE, PACK or UNPACK instruction being processed, and where the first means generates the first signals prior to the second means generating the second signals and independent of whether the second means generates the second signals.
    Type: Grant
    Filed: November 2, 1992
    Date of Patent: June 20, 1995
    Assignee: Amdahl Corporation
    Inventors: Chris Norrie, Stephen J. Rawlinson, Allan Zmyslowski