Patents by Inventor Chris PAPADOPOULOS

Chris PAPADOPOULOS has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160327607
    Abstract: A method of transforming a fault tree diagram of an engineering system comprising a plurality of cut-set matrices and logic gates. Each column of the cut-set matrix corresponds to an event of the system, and each row of the cut-set matrix indicates a combination of occurred events. Each logic gate takes as input the cut-set matrices and/or outputs from other logic gates. The method includes selecting at least one logic gate that has as inputs only one or more cut-set matrices and determining a set of events corresponding to f the one or more cut-set matrices received by the selected logic gate. A replacement cut-set matrix for the selected logic gate is then determined and the selected logic gate is then replaced with the replacement cut-set matrix.
    Type: Application
    Filed: May 4, 2016
    Publication date: November 10, 2016
    Inventors: Chris PAPADOPOULOS, Alberto Bernad BLANCHE, Serema TIGANI