Patents by Inventor Chris Pavlas
Chris Pavlas has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11960429Abstract: Methods, apparatus, and computer platforms and architectures employing many-to-many and many-to-one peripheral switches. The methods and apparatus may be implemented on computer platforms having multiple nodes, such as those employing a Non-uniform Memory Access (NUMA) architecture, wherein each node comprises a plurality of components including a processor having at least one level of memory cache and being operatively coupled to system memory and operatively coupled to a many-to-many peripheral switch that includes a plurality of downstream ports to which NICs and/or peripheral expansion slots are operatively coupled, or a many-to-one switch that enables a peripheral device to be shared by multiple nodes. During operation, packets are received at the NICs and DMA memory writes are initiated using memory write transactions identifying a destination memory address.Type: GrantFiled: December 15, 2022Date of Patent: April 16, 2024Assignee: Intel CorporationInventors: Patrick Connor, Matthew A. Jared, Duke C. Hong, Elizabeth M. Kappler, Chris Pavlas, Scott P. Dubal
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Publication number: 20230195499Abstract: Technologies for deploying virtual machines (VMs) in a virtual network function (VNF) infrastructure include a compute device configured to collect a plurality of performance metrics based on a set of key performance indicators, determine a key performance indicator value for each of the set of key performance indicators based on the collected plurality of performance metrics, and determine a service quality index for a virtual machine (VM) instance of a plurality of VM instances managed by the compute as a function each key performance indicator value. Additionally, the compute device is configured to determine whether the determined service quality index is acceptable and perform, in response to a determination that the determined service quality index is not acceptable, an optimization action to ensure the VM instance is deployed on an acceptable host of the compute device. Other embodiments are described herein.Type: ApplicationFiled: December 14, 2022Publication date: June 22, 2023Inventors: Patrick CONNOR, Scott DUBAL, Chris PAVLAS, Katalin BARTFAI-WALCOTT, Amritha NAMBIAR, Sharada Ashok SHIDDIBHAVI
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Publication number: 20230176987Abstract: Methods, apparatus, and computer platforms and architectures employing many-to-many and many-to-one peripheral switches. The methods and apparatus may be implemented on computer platforms having multiple nodes, such as those employing a Non-uniform Memory Access (NUMA) architecture, wherein each node comprises a plurality of components including a processor having at least one level of memory cache and being operatively coupled to system memory and operatively coupled to a many-to-many peripheral switch that includes a plurality of downstream ports to which NICs and/or peripheral expansion slots are operatively coupled, or a many-to-one switch that enables a peripheral device to be shared by multiple nodes. During operation, packets are received at the NICs and DMA memory writes are initiated using memory write transactions identifying a destination memory address.Type: ApplicationFiled: December 15, 2022Publication date: June 8, 2023Inventors: Patrick Connor, Matthew A. JARED, Duke C. HONG, Elizabeth M. KAPPLER, Chris Pavlas, Scott P. Dubal
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Patent number: 11593292Abstract: Methods, apparatus, and computer platforms and architectures employing many-to-many and many-to-one peripheral switches. The methods and apparatus may be implemented on computer platforms having multiple nodes, such as those employing a Non-uniform Memory Access (NUMA) architecture, wherein each node comprises a plurality of components including a processor having at least one level of memory cache and being operatively coupled to system memory and operatively coupled to a many-to-many peripheral switch that includes a plurality of downstream ports to which NICs and/or peripheral expansion slots are operatively coupled, or a many-to-one switch that enables a peripheral device to be shared by multiple nodes. During operation, packets are received at the NICs and DMA memory writes are initiated using memory write transactions identifying a destination memory address.Type: GrantFiled: June 5, 2020Date of Patent: February 28, 2023Assignee: Intel CorporationInventors: Patrick Connor, Matthew A. Jared, Duke C. Hong, Elizabeth M. Kappler, Chris Pavlas, Scott P. Dubal
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Patent number: 11550606Abstract: Technologies for deploying virtual machines (VMs) in a virtual network function (VNF) infrastructure include a compute device configured to collect a plurality of performance metrics based on a set of key performance indicators, determine a key performance indicator value for each of the set of key performance indicators based on the collected plurality of performance metrics, and determine a service quality index for a virtual machine (VM) instance of a plurality of VM instances managed by the compute as a function each key performance indicator value. Additionally, the compute device is configured to determine whether the determined service quality index is acceptable and perform, in response to a determination that the determined service quality index is not acceptable, an optimization action to ensure the VM instance is deployed on an acceptable host of the compute device. Other embodiments are described herein.Type: GrantFiled: September 13, 2018Date of Patent: January 10, 2023Assignee: Intel CorporationInventors: Patrick Connor, Scott Dubal, Chris Pavlas, Katalin Bartfai-Walcott, Amritha Nambiar, Sharada Ashok Shiddibhavi
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Patent number: 11032357Abstract: Systems, apparatuses, and/or methods to provide data processing offload. An apparatus may determine whether a task is to be processed locally at a client device or remotely off the client device and issue the task to a wireless network and/or a wired network when the task is to be processed remotely off the client device at a server device. An apparatus may identify the task from the wireless network and/or the wired network when the task is to be processed locally at the server device, distribute the task to a server resource at the server device when the task is to be to processed locally at the service device, and provide a result of the task to the wireless network and/or the wired network when the result is to be consumed remotely at the client device.Type: GrantFiled: March 30, 2017Date of Patent: June 8, 2021Assignee: Intel CorporationInventors: Karthik Veeramani, Ujwal Paidipathi, Rajneesh Chowdhury, Prakash N. Iyer, Maciej Machnikowski, Chris Pavlas, Scott P. Dubal
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Publication number: 20200301864Abstract: Methods, apparatus, and computer platforms and architectures employing many-to-many and many-to-one peripheral switches. The methods and apparatus may be implemented on computer platforms having multiple nodes, such as those employing a Non-uniform Memory Access (NUMA) architecture, wherein each node comprises a plurality of components including a processor having at least one level of memory cache and being operatively coupled to system memory and operatively coupled to a many-to-many peripheral switch that includes a plurality of downstream ports to which NICs and/or peripheral expansion slots are operatively coupled, or a many-to-one switch that enables a peripheral device to be shared by multiple nodes. During operation, packets are received at the NICs and DMA memory writes are initiated using memory write transactions identifying a destination memory address.Type: ApplicationFiled: June 5, 2020Publication date: September 24, 2020Applicant: INTEL CORPORATIONInventors: Patrick Connor, Matthew A. Jared, Duke C. Hong, Elizabeth M. Kappler, Chris Pavlas, Scott P. Dubal
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Patent number: 10684973Abstract: Methods, apparatus, and computer platforms and architectures employing many-to-many and many-to-one peripheral switches. The methods and apparatus may be implemented on computer platforms having multiple nodes, such as those employing a Non-uniform Memory Access (NUMA) architecture, wherein each node comprises a plurality of components including a processor having at least one level of memory cache and being operatively coupled to system memory and operatively coupled to a many-to-many peripheral switch that includes a plurality of downstream ports to which NICs and/or peripheral expansion slots are operatively coupled, or a many-to-one switch that enables a peripheral device to be shared by multiple nodes. During operation, packets are received at the NICs and DMA memory writes are initiated using memory write transactions identifying a destination memory address.Type: GrantFiled: August 30, 2013Date of Patent: June 16, 2020Assignee: Intel CorporationInventors: Patrick Connor, Matthew A. Jared, Duke C. Hong, Elizabeth M. Kappler, Chris Pavlas, Scott P. Dubal
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Publication number: 20200186553Abstract: One embodiment provides an apparatus. The apparatus includes detector circuitry and monitor logic local to a computing device. The detector circuitry is to generate local sensor data based, at least in part, on a sensor signal received from a sensor incorporated in the local computing device. The monitor logic is to identify an event based, at least in part, on the local sensor data. The generating and identifying is independent of operation of an operating system and/or an application executing on the local computing device.Type: ApplicationFiled: February 18, 2020Publication date: June 11, 2020Applicant: Intel CorporationInventors: CHRIS PAVLAS, SCOTT DUBAL, Sharada Shiddibhavi, Amritha Nambiar, TREVOR COOPER, Robert Love, Calin Gherghe
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Patent number: 10423783Abstract: Methods and apparatus to recover a processor state during a system failure or security event are disclosed. An example apparatus to recover data includes a processor including a local memory and a system monitor in communication with the processor. The system monitor is to copy processor backup data to a non-volatile memory in response to a processor backup event. The processor backup data includes contents of the local memory.Type: GrantFiled: December 19, 2016Date of Patent: September 24, 2019Assignee: Intel CorporationInventors: Chris Pavlas, James R. Hearn, Scott P. Dubal, Patrick Connor
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Publication number: 20190042297Abstract: Technologies for deploying virtual machines (VMs) in a virtual network function (VNF) infrastructure include a compute device configured to collect a plurality of performance metrics based on a set of key performance indicators, determine a key performance indicator value for each of the set of key performance indicators based on the collected plurality of performance metrics, and determine a service quality index for a virtual machine (VM) instance of a plurality of VM instances managed by the compute as a function each key performance indicator value. Additionally, the compute device is configured to determine whether the determined service quality index is acceptable and perform, in response to a determination that the determined service quality index is not acceptable, an optimization action to ensure the VM instance is deployed on an acceptable host of the compute device. Other embodiments are described herein.Type: ApplicationFiled: September 13, 2018Publication date: February 7, 2019Inventors: Patrick Connor, Scott Dubal, Chris Pavlas, Katalin Bartfai-Walcott, Amritha Nambiar, Sharada Ashok Shiddibhavi
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Publication number: 20180288137Abstract: Systems, apparatuses, and/or methods to provide data processing offload. An apparatus may determine whether a task is to be processed locally at a client device or remotely off the client device and issue the task to a wireless network and/or a wired network when the task is to be processed remotely off the client device at a server device. An apparatus may identify the task from the wireless network and/or the wired network when the task is to be processed locally at the server device, distribute the task to a server resource at the server device when the task is to be to processed locally at the service device, and provide a result of the task to the wireless network and/or the wired network when the result is to be consumed remotely at the client device.Type: ApplicationFiled: March 30, 2017Publication date: October 4, 2018Inventors: Karthik Veeramani, Ujwal Paidipathi, Rajneesh Chowdhury, Prakash N. Iyer, Maciej Machnikowski, Chris Pavlas, Scott P. Dubal
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Publication number: 20180181421Abstract: An example computer system for transferring a packet includes a hypervisor to run a first virtual machine and a second virtual machine. The computer system also includes a first memory address space associated with the first virtual machine to store the packet. The computer system further includes a second memory address space associated with the second virtual machine to receive and store the packet. The computer system also includes a virtual switch coupled to the first virtual machine and the second virtual machine to detect that the packet is to be sent from the first virtual machine to the second virtual machine. The computer system further includes a direct memory access device to copy the packet from the first memory address space to the second memory address space via the direct memory access device.Type: ApplicationFiled: December 27, 2016Publication date: June 28, 2018Inventors: Patrick Connor, Scott P. Dubal, James R. Hearn, Iosif Gasparakis, Chris Pavlas, Eliezer Tamir
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Publication number: 20180173580Abstract: Methods and apparatus to recover a processor state during a system failure or security event are disclosed. An example apparatus to recover data includes a processor including a local memory and a system monitor in communication with the processor. The system monitor is to copy processor backup data to a non-volatile memory in response to a processor backup event. The processor backup data includes contents of the local memory.Type: ApplicationFiled: December 19, 2016Publication date: June 21, 2018Inventors: Chris Pavlas, James R. Hearn, Scott P. Dubal, Patrick Connor
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Publication number: 20180097825Abstract: One embodiment provides an apparatus. The apparatus includes detector circuitry and monitor logic local to a computing device. The detector circuitry is to generate local sensor data based, at least in part, on a sensor signal received from a sensor incorporated in the local computing device. The monitor logic is to identify an event based, at least in part, on the local sensor data. The generating and identifying is independent of operation of an operating system and/or an application executing on the local computing device.Type: ApplicationFiled: September 30, 2016Publication date: April 5, 2018Applicant: INTEL CORPORATIONInventors: CHRIS PAVLAS, SCOTT DUBAL, Sharada Shiddibhavi, Amritha Nambiar, TREVOR COOPER, Robert Love, Calin Gherghe
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Patent number: 9712337Abstract: Methods and apparatus for implementing Power over Ethernet (PoE) for auxiliary power in computer systems. Under aspects of the methods, one or more voltage inputs comprising standard power input is employed by a power control component in a network interface in an apparatus such as a network adaptor board, a System on a Chip (SoC), computer server or server blade to supply power to a network controller on the apparatus when the apparatus is operating at a normal power state. To enable the apparatus to maintain network communication when operating at a reduced power state, a PoE power input derived from at least one PoE signal received at at least one Ethernet jack of the apparatus is employed to provide power to the network controller absent use or availability of the standard power input. Accordingly, the PoE power input facilitates an auxiliary power function that may be used alone or in combination with existing (as applicable) auxiliary power input when apparatus are operated in reduced power states.Type: GrantFiled: March 6, 2013Date of Patent: July 18, 2017Assignee: Intel CorporationInventors: Paul Greenwalt, Patrick Connor, Scott P. Dubal, Chris Pavlas
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Patent number: 9608733Abstract: Embodiments of the present disclosure are directed toward techniques and configurations for an optical apparatus to control optical power of the light source. In one embodiment, the apparatus may include a transmitter and receiver to transmit and receive optical signals over an optical communication channel, and a controller to cause the transmitter to transmit pulse signals at a first power level and detect a change in optical power in the channel, indicating a presence of a signal from another optical apparatus. The controller may confirm that the detected apparatus is capable of communications at a second power level (greater than the first level) and initiate data transmission at the second level. Upon detection of a failure in the channel, the controller may cause the transmitter to halt the data transmission and restart the pulse signals at the first power level. Other embodiments may be described and/or claimed.Type: GrantFiled: June 9, 2014Date of Patent: March 28, 2017Assignee: Intel CorporationInventors: Chris Pavlas, Guobin Liu, Maciej Machnikowski, Christine M. Krause, Scott P. Dubal
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Patent number: 9537979Abstract: One embodiment provides a network adapter. The network adapter includes a network adapter controller, a medium access controller (MAC) and a physical layer (PHY) including at least one port. The network adapter further includes optical communication logic to at least one of receive and/or acquire a local alert and generate a local alert message related to the local alert, the local alert message including an alert identifier (ID) and a network adapter ID. The network adapter further includes a first light emitting diode (LED) to convert the local alert message to a corresponding optical local alert message and to transmit the optical local alert message to an optical communication path.Type: GrantFiled: December 12, 2014Date of Patent: January 3, 2017Assignee: INTEL CORPORATIONInventors: Scott P. Dubal, Patrick Connor, Chris Pavlas
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Patent number: 9502802Abstract: An apparatus and method for using conductive adhesive fibers as a data interface are disclosed. A particular embodiment includes: a first array of conductive adhesive fiber fastener pads configured for attachment to a first item; a second array of conductive adhesive fiber fastener pads configured for attachment to a second item, each pad of the first and second array being fabricated with a hook or loop removable fastener, each removable fastener being electrically conductive, the first array of pads being arranged to align with the second array of pads to create a plurality of independent electrical connections when the first item is removably attached to the second item, the plurality of independent electrical connections establishing a data interface connection between the first item and the second item.Type: GrantFiled: June 27, 2014Date of Patent: November 22, 2016Assignee: Intel CorporationInventors: Scott P. Dubal, Douglas D. Boom, Patrick Connor, Chris Pavlas
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Patent number: 9471350Abstract: Methods, apparatus, software, and system architectures for supporting virtualized system migrations and scaling. Under aspects of a method, data is automatically collected and aggregated at multiple levels by a plurality of agents for each of multiple data centers. The data includes data relating to virtual machine utilization, data relating to electrical utilization costs, data relating to data center utilization, and data relating to triggers events. The data is processed to determine whether to migrate virtual servers from a first data center to a second data center. The software architecture includes a plurality of modules including a controller, data center profile, transition triggers, power cost profile, and virtual machine package module. The agents are implemented in an agent hierarchy and configured to collect data themselves and/or aggregate data from other agents and provide an API to facilitate access to collected data and agent services.Type: GrantFiled: September 26, 2013Date of Patent: October 18, 2016Assignee: Intel CorporationInventors: Chris Pavlas, Duke C. Hong, Scott P. Dubal, Elizabeth M. Kappler, Patrick Connor, Matthew A. Jared