Patents by Inventor Chris Speyer

Chris Speyer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7326582
    Abstract: The present invention is generally directed to an optical isolator device, and various methods of making same. In one illustrative embodiment, the method comprises obtaining a single SOI substrate, the SOI substrate having an active layer comprised of silicon and a buried insulation layer, forming a doped layer of silicon above the active layer of the SOI substrate, forming first and second isolated regions in at least the doped layer of silicon, forming a photon generating device in the first isolated region, and forming a photon receiving device in the second isolated region.
    Type: Grant
    Filed: January 10, 2007
    Date of Patent: February 5, 2008
    Assignee: Legerity, Inc.
    Inventors: Chris Speyer, William E. Moore
  • Publication number: 20070111464
    Abstract: The present invention is generally directed to an optical isolator device, and various methods of making same. In one illustrative embodiment, the method comprises obtaining a single SOI substrate, the SOI substrate having an active layer comprised of silicon and a buried insulation layer, forming a doped layer of silicon above the active layer of the SOI substrate, forming first and second isolated regions in at least the doped layer of silicon, forming a photon generating device in the first isolated region, and forming a photon receiving device in the second isolated region.
    Type: Application
    Filed: January 10, 2007
    Publication date: May 17, 2007
    Inventors: Chris Speyer, William Moore
  • Patent number: 7180098
    Abstract: The present invention is generally directed to an optical isolator device, and various methods of making same. In one illustrative embodiment, the method comprises obtaining a single SOI substrate, the SOI substrate having an active layer comprised of silicon and a buried insulation layer, forming a doped layer of silicon above the active layer of the SOI substrate, forming first and second isolated regions in at least the doped layer of silicon, forming a photon generating device in the first isolated region, and forming a photon receiving device in the second isolated region.
    Type: Grant
    Filed: April 5, 2004
    Date of Patent: February 20, 2007
    Assignee: Legerity, Inc.
    Inventors: Chris Speyer, William E. Moore
  • Patent number: 7141478
    Abstract: The present invention is generally directed to a multi-stage epi process for forming semiconductor devices, and the resulting device. In one illustrative embodiment, the method comprises forming a first layer of epitaxial silicon above a surface of a semiconducting substrate, forming a second layer of epitaxial silicon above the first layer of epitaxial silicon, forming a third layer of epitaxial silicon above the second layer of epitaxial silicon, forming a trench isolation region that extends through at least the third layer of epitaxial silicon and forming a portion of a semiconductor device above the third layer of epitaxial silicon within an area defined by the isolation region.
    Type: Grant
    Filed: January 26, 2004
    Date of Patent: November 28, 2006
    Assignee: Legerity Inc.
    Inventor: Chris Speyer
  • Publication number: 20050221517
    Abstract: The present invention is generally directed to an optical isolator device, and various methods of making same. In one illustrative embodiment, the method comprises obtaining a single SOI substrate, the SOI substrate having an active layer comprised of silicon and a buried insulation layer, forming a doped layer of silicon above the active layer of the SOI substrate, forming first and second isolated regions in at least the doped layer of silicon, forming a photon generating device in the first isolated region, and forming a photon receiving device in the second isolated region.
    Type: Application
    Filed: April 5, 2004
    Publication date: October 6, 2005
    Inventors: Chris Speyer, William Moore
  • Publication number: 20050164463
    Abstract: The present invention is generally directed to a multi-stage epi process for forming semiconductor devices, and the resulting device. In one illustrative embodiment, the method comprises forming a first layer of epitaxial silicon above a surface of a semiconducting substrate, forming a second layer of epitaxial silicon above the first layer of epitaxial silicon, forming a third layer of epitaxial silicon above the second layer of epitaxial silicon, forming a trench isolation region that extends through at least the third layer of epitaxial silicon and forming a portion of a semiconductor device above the third layer of epitaxial silicon within an area defined by the isolation region.
    Type: Application
    Filed: January 26, 2004
    Publication date: July 28, 2005
    Inventor: Chris Speyer
  • Publication number: 20050136588
    Abstract: The present invention is generally directed to various methods of forming isolation regions. In one illustrative embodiment, the method comprises forming a stack of process layers above a surface of a semiconducting substrate, the stack of process layers comprised of a first layer of insulating material formed above a surface of the substrate, an etch stop layer positioned above the first layer of insulating material, wherein the etch stop layer has an etch selectivity with respect to the first layer of insulating material of at least 3:1, and a second layer of insulating material positioned above the etch stop layer.
    Type: Application
    Filed: December 23, 2003
    Publication date: June 23, 2005
    Inventor: Chris Speyer