Patents by Inventor Chris Wiebe

Chris Wiebe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10763125
    Abstract: A semiconductor device comprising a substrate layer, an epitaxial layer, a dielectric layer, a first aluminum layer, a first titanium interlayer and a second aluminum layer. The first titanium interlayer is disposed between the first aluminum layer and the second aluminum layer. A process for fabricating a semiconductor device comprising the steps of: preparing a semiconductor wafer; depositing a first aluminum layer onto the semiconductor wafer; depositing a first titanium interlayer onto the first aluminum layer; depositing a second aluminum layer onto the first titanium interlayer; applying an etching process so that a plurality of trenches are formed so as to expose a plurality of top surfaces of a dielectric layer; and applying a singulation process so as to form a plurality of separated semiconductor devices.
    Type: Grant
    Filed: August 29, 2019
    Date of Patent: September 1, 2020
    Assignee: ALPHA AND OMEGA SEMICONDUCTOR (CAYMAN), LTD.
    Inventors: Wei He, Chris Wiebe, Hongyong Xue
  • Patent number: 10686038
    Abstract: An RC-IGBT includes a semiconductor body incorporating a field stop zone where the base region and the field stop zone are both formed using an epitaxial process and the field stop zone has an enhanced doping profile to realize improved soft-switching performance for the semiconductor device. In alternate embodiments, RC-IGBT device, including the epitaxial layer field stop zone, are realized through a fabrication process that uses front side processing only to form the backside contact regions and the front side device region. The fabrication method forms an RC-IGBT device using front side processing to form the backside contact regions and then using wafer bonding process to flip the semiconductor structure onto a carrier wafer so that front side processing is used again to form the device region.
    Type: Grant
    Filed: November 2, 2018
    Date of Patent: June 16, 2020
    Assignee: ALPHA AND OMEGA SEMICONDUCTOR (CAYMAN) LTD.
    Inventors: Hongyong Xue, Lei Zhang, Brian Schorr, Chris Wiebe, Wenjun Li
  • Publication number: 20190385863
    Abstract: A semiconductor device comprising a substrate layer, an epitaxial layer, a dielectric layer, a first aluminum layer, a first titanium interlayer and a second aluminum layer. The first titanium interlayer is disposed between the first aluminum layer and the second aluminum layer. A process for fabricating a semiconductor device comprising the steps of: preparing a semiconductor wafer; depositing a first aluminum layer onto the semiconductor wafer; depositing a first titanium interlayer onto the first aluminum layer; depositing a second aluminum layer onto the first titanium interlayer; applying an etching process so that a plurality of trenches are formed so as to expose a plurality of top surfaces of a dielectric layer; and applying a singulation process so as to form a plurality of separated semiconductor devices.
    Type: Application
    Filed: August 29, 2019
    Publication date: December 19, 2019
    Applicant: Alpha and Omega Semiconductor (Cayman) Ltd.
    Inventors: Wei He, Chris Wiebe, Hongyong Xue
  • Patent number: 10438813
    Abstract: A semiconductor device comprising a substrate layer, an epitaxial layer, a dielectric layer, a first aluminum layer, a first titanium interlayer and a second aluminum layer. The first titanium interlayer is disposed between the first aluminum layer and the second aluminum layer. A process for fabricating a semiconductor device comprising the steps of: preparing a semiconductor wafer; depositing a first aluminum layer onto the semiconductor wafer; depositing a first titanium interlayer onto the first aluminum layer; depositing a second aluminum layer onto the first titanium interlayer; applying an etching process so that a plurality of trenches are formed so as to expose a plurality of top surfaces of a dielectric layer; and applying a singulation process so as to form a plurality of separated semiconductor devices.
    Type: Grant
    Filed: November 13, 2017
    Date of Patent: October 8, 2019
    Assignee: Alpha and Omega Semiconductor (Cayman) Ltd.
    Inventors: Wei He, Chris Wiebe, Hongyong Xue
  • Publication number: 20190148165
    Abstract: A semiconductor device comprising a substrate layer, an epitaxial layer, a dielectric layer, a first aluminum layer, a first titanium interlayer and a second aluminum layer. The first titanium interlayer is disposed between the first aluminum layer and the second aluminum layer. A process for fabricating a semiconductor device comprising the steps of: preparing a semiconductor wafer; depositing a first aluminum layer onto the semiconductor wafer; depositing a first titanium interlayer onto the first aluminum layer; depositing a second aluminum layer onto the first titanium interlayer; applying an etching process so that a plurality of trenches are formed so as to expose a plurality of top surfaces of a dielectric layer; and applying a singulation process so as to form a plurality of separated semiconductor devices.
    Type: Application
    Filed: November 13, 2017
    Publication date: May 16, 2019
    Applicant: Alpha and Omega Semiconductor (Cayman) Ltd.
    Inventors: Wei He, Chris Wiebe, Hongyong Xue
  • Publication number: 20190088745
    Abstract: An RC-IGBT includes a semiconductor body incorporating a field stop zone where the base region and the field stop zone are both formed using an epitaxial process and the field stop zone has an enhanced doping profile to realize improved soft-switching performance for the semiconductor device. In alternate embodiments, RC-IGBT device, including the epitaxial layer field stop zone, are realized through a fabrication process that uses front side processing only to form the backside contact regions and the front side device region. The fabrication method forms an RC-IGBT device using front side processing to form the backside contact regions and then using wafer bonding process to flip the semiconductor structure onto a carrier wafer so that front side processing is used again to form the device region.
    Type: Application
    Filed: November 2, 2018
    Publication date: March 21, 2019
    Inventors: Hongyong Xue, Lei Zhang, Brian Schorr, Chris Wiebe, Wenjun Li
  • Publication number: 20190006467
    Abstract: An RC-IGBT includes a semiconductor body formed having a base region incorporating a field stop zone where the base region and the field stop zone are both formed using an epitaxial process and the field stop zone has an enhanced doping profile to realize improved soft-switching performance for the semiconductor device. In alternate embodiments, RC-IGBT device, including the epitaxial layer field stop zone, are realized through a fabrication process that uses front side processing only to form the backside contact regions and the front side device region. The fabrication method forms an RC-IGBT device using front side processing to form the backside contact regions and then using wafer bonding process to flip the semiconductor structure onto a carrier wafer so that front side processing is used again to form the device region.
    Type: Application
    Filed: June 29, 2017
    Publication date: January 3, 2019
    Inventors: Hongyong Xue, Lei Zhang, Brian Schorr, Chris Wiebe, Wenjun Li
  • Patent number: 10170559
    Abstract: An RC-IGBT includes a semiconductor body formed having a base region incorporating a field stop zone where the base region and the field stop zone are both formed using an epitaxial process and the field stop zone has an enhanced doping profile to realize improved soft-switching performance for the semiconductor device. In alternate embodiments, RC-IGBT device, including the epitaxial layer field stop zone, are realized through a fabrication process that uses front side processing only to form the backside contact regions and the front side device region. The fabrication method forms an RC-IGBT device using front side processing to form the backside contact regions and then using wafer bonding process to flip the semiconductor structure onto a carrier wafer so that front side processing is used again to form the device region.
    Type: Grant
    Filed: June 29, 2017
    Date of Patent: January 1, 2019
    Assignee: Alpha and Omega Semiconductor (Cayman) Ltd.
    Inventors: Hongyong Xue, Lei Zhang, Brian Schorr, Chris Wiebe, Wenjun Li
  • Patent number: 7813715
    Abstract: Techniques that facilitate pairing of wireless accessory devices with wireless host devices are disclosed. Advantageously, the improved techniques permit pairing of wireless devices without requiring user entry of pin codes. In one embodiment, a wireless accessory device, such as a headset or earphone, can be paired with a wireless host device, such as a mobile phone or media player.
    Type: Grant
    Filed: August 30, 2006
    Date of Patent: October 12, 2010
    Assignee: Apple Inc.
    Inventors: Chris McKillop, Chris Wiebe
  • Publication number: 20080057890
    Abstract: Techniques that facilitate pairing of wireless accessory devices with wireless host devices are disclosed. Advantageously, the improved techniques permit pairing of wireless devices without requiring user entry of pin codes. In one embodiment, a wireless accessory device, such as a headset or earphone, can be paired with a wireless host device, such as a mobile phone or media player.
    Type: Application
    Filed: August 30, 2006
    Publication date: March 6, 2008
    Inventors: Chris McKillop, Chris Wiebe