Patents by Inventor Christiaan J. Werkhoven

Christiaan J. Werkhoven has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9716148
    Abstract: Methods of fabricating semiconductor structures include the formation of molybdenum nitride at one or more surfaces of a substrate comprising molybdenum, and providing a layer of III-V semiconductor material, such as GaN, over the substrate. Semiconductor structures formed by methods described herein may include a substrate comprising molybdenum, molybdenum nitride at one or more surfaces of the substrate, and a layer of GaN bonded to the molybdenum nitride.
    Type: Grant
    Filed: December 22, 2014
    Date of Patent: July 25, 2017
    Assignee: Soitec
    Inventor: Christiaan J. Werkhoven
  • Publication number: 20160145767
    Abstract: Deposition systems include a reaction chamber, and a substrate support structure disposed at least partially within the reaction chamber. The systems further include at least one gas injection device and at least one vacuum device, which together are used to flow process gases through the reaction chamber. The systems also include at least one access gate through which a workpiece substrate may be loaded into the reaction chamber and unloaded out from the reaction chamber. The at least one access gate is located remote from the gas injection device. Methods of depositing semiconductor material may be performed using such deposition systems. Methods of fabricating such deposition systems may include coupling an access gate to a reaction chamber at a location remote from a gas injection device.
    Type: Application
    Filed: February 2, 2016
    Publication date: May 26, 2016
    Inventors: Ronald Thomas Bertram, JR., Christiaan J. Werkhoven, Chantal Arena, Ed Lindow
  • Patent number: 9312339
    Abstract: Methods of fabricating semiconductor structures include forming a plurality of openings extending through a semiconductor material and at least partially through a metal material and deforming the metal material to relax a remaining portion of the semiconductor material. The metal material may be deformed by exposing the metal material to a temperature sufficient to alter (i.e., increase) its ductility. The metal material may be formed from one or more of hafnium, zirconium, yttrium, and a metallic glass. Another semiconductor material may be deposited over the remaining portions of the semiconductor material, and a portion of the metal material may be removed from between each of the remaining portions of the semiconductor material. Semiconductor structures may be formed using such methods.
    Type: Grant
    Filed: January 27, 2014
    Date of Patent: April 12, 2016
    Assignee: Soitec
    Inventor: Christiaan J. Werkhoven
  • Patent number: 9202741
    Abstract: Embodiments relate to semiconductor structures and methods of forming them. In some embodiments, the methods may be used to fabricate a semiconductor substrate by forming a weakened zone in a donor structure at a predetermined depth to define a transfer layer between an attachment surface and the weakened zone and a residual donor structure between the weakened zone and a surface opposite the attachment surface. A metallic layer is formed on the attachment surface and provides an ohmic contact between the metallic layer and the transfer layer, a matched Coefficient of Thermal Expansion (CTE) for the metallic layer that closely matches a CTE of the transfer layer, and sufficient stiffness to provide structural support to the transfer layer. The transfer layer is separated from the donor structure at the weakened zone to form a composite substrate comprising the transfer layer and the metallic layer.
    Type: Grant
    Filed: March 21, 2013
    Date of Patent: December 1, 2015
    Assignee: SOITEC
    Inventors: Christiaan J. Werkhoven, Chantal Arena
  • Publication number: 20150340430
    Abstract: Embodiments relate to semiconductor structures and methods of forming semiconductor structures. The semiconductor structures include a substrate layer having a CTE that closely matches a CTE of one or more layers of semiconductor material formed over the substrate layer. In some embodiments, the substrate layers may comprise a composite substrate material including two or more elements. The substrate layers may comprise a metal material and/or a ceramic material in some embodiments.
    Type: Application
    Filed: August 4, 2015
    Publication date: November 26, 2015
    Inventors: Christiaan J. Werkhoven, Chantal Arena
  • Patent number: 9175419
    Abstract: This invention provides gas injector apparatus that extends into a growth chamber in order to provide more accurate delivery of thermalized precursor gases. The improved injector can distribute heated precursor gases into a growth chamber in flows that are spatially separated from each other up until they impinge on a growth substrate and that have volumes adequate for high-volume manufacture. Importantly, the improved injector is sized and configured so that it can fit into existing commercial growth chambers without hindering the operation of mechanical and robot substrate-handling equipment used with such chambers. This invention is useful for the high-volume growth of numerous elemental and compound semiconductors, and particularly useful for the high-volume growth of Group III-V compounds and GaN.
    Type: Grant
    Filed: December 5, 2008
    Date of Patent: November 3, 2015
    Assignee: SOITEC
    Inventors: Chantal Arena, Christiaan J. Werkhoven, Ronald Thomas Bertram, Jr., Ed Lindow, Dennis L. Goodwin
  • Patent number: 9142412
    Abstract: Embodiments relate to semiconductor structures and methods of forming semiconductor structures. The semiconductor structures include a substrate layer having a CTE that closely matches a CTE of one or more layers of semiconductor material formed over the substrate layer. In some embodiments, the substrate layers may comprise a composite substrate material including two or more elements. The substrate layers may comprise a metal material and/or a ceramic material in some embodiments.
    Type: Grant
    Filed: December 23, 2011
    Date of Patent: September 22, 2015
    Assignee: SOITEC
    Inventors: Christiaan J. Werkhoven, Chantal Arena
  • Patent number: 9082948
    Abstract: Methods for fabricating a semiconductor substrate include forming a first substrate layer over a surface of a first semiconductor layer, and thermally spraying a second substrate layer on a side of the first substrate layer opposite the first semiconductor layer. At least one additional semiconductor layer is epitaxially grown over the first semiconductor layer on a side thereof opposite the first substrate layer. At least one of the first substrate layer and the second substrate layer may be formulated to exhibit a Coefficient of Thermal Expansion (CTE) closely matching a CTE of at least one of the first semiconductor layer and the at least one additional semiconductor layer. Semiconductor structures are fabricated using such methods.
    Type: Grant
    Filed: December 23, 2011
    Date of Patent: July 14, 2015
    Assignee: SOITEC
    Inventors: Christiaan J. Werkhoven, Chantal Arena
  • Publication number: 20150144958
    Abstract: Methods of fabricating semiconductor structures include the formation of molybdenum nitride at one or more surfaces of a substrate comprising molybdenum, and providing a layer of III-V semiconductor material, such as GaN, over the substrate. Semiconductor structures formed by methods described herein may include a substrate comprising molybdenum, molybdenum nitride at one or more surfaces of the substrate, and a layer of GaN bonded to the molybdenum nitride.
    Type: Application
    Filed: December 22, 2014
    Publication date: May 28, 2015
    Inventor: Christiaan J. Werkhoven
  • Patent number: 8916483
    Abstract: Methods of fabricating semiconductor structures include the formation of molybdenum nitride at one or more surfaces of a substrate comprising molybdenum, and providing a layer of III-V semiconductor material, such as GaN, over the substrate. Semiconductor structures formed by methods described herein may include a substrate comprising molybdenum, molybdenum nitride at one or more surfaces of the substrate, and a layer of GaN bonded to the molybdenum nitride.
    Type: Grant
    Filed: March 9, 2012
    Date of Patent: December 23, 2014
    Assignee: SOITEC
    Inventor: Christiaan J. Werkhoven
  • Patent number: 8785316
    Abstract: Methods of depositing a III-V semiconductor material on a substrate include sequentially introducing a gaseous precursor of a group III element and a gaseous precursor of a group V element to the substrate by altering spatial positioning of the substrate with respect to a plurality of gas columns. For example, the substrate may be moved relative to a plurality of substantially aligned gas columns, each disposing a different precursor. Thermalizing gas injectors for generating the precursors may include an inlet, a thermalizing conduit, a liquid container configured to hold a liquid reagent therein, and an outlet. Deposition systems for forming one or more III-V semiconductor materials on a surface of the substrate may include one or more such thermalizing gas injectors configured to direct the precursor to the substrate via the plurality of gas columns.
    Type: Grant
    Filed: July 2, 2013
    Date of Patent: July 22, 2014
    Assignee: Soitec
    Inventor: Christiaan J. Werkhoven
  • Patent number: 8741385
    Abstract: The present invention relates to the field of semiconductor processing and provides methods that improve chemical vapor deposition (CVD) of semiconductor materials by promoting more efficient thermalization of precursor gases prior to their reaction. In preferred embodiments, the method provides heat transfer structures and their arrangement within a CVD reactor so as to promote heat transfer to flowing process gases. In certain preferred embodiments applicable to CVD reactors transparent to radiation from heat lamps, the invention provides radiation-absorbent surfaces placed to intercept radiation from the heat lamps and to transfer it to flowing process gases.
    Type: Grant
    Filed: January 28, 2013
    Date of Patent: June 3, 2014
    Assignee: Soitec
    Inventors: Chantal Arena, Christiaan J. Werkhoven, Ronald Thomas Bertram, Jr., Ed Lindow
  • Publication number: 20140138796
    Abstract: Methods of fabricating semiconductor structures include forming a plurality of openings extending through a semiconductor material and at least partially through a metal material and deforming the metal material to relax a remaining portion of the semiconductor material. The metal material may be deformed by exposing the metal material to a temperature sufficient to alter (i.e., increase) its ductility. The metal material may be formed from one or more of hafnium, zirconium, yttrium, and a metallic glass. Another semiconductor material may be deposited over the remaining portions of the semiconductor material, and a portion of the metal material may be removed from between each of the remaining portions of the semiconductor material. Semiconductor structures may be formed using such methods.
    Type: Application
    Filed: January 27, 2014
    Publication date: May 22, 2014
    Applicant: Soitec
    Inventor: Christiaan J. Werkhoven
  • Patent number: 8692260
    Abstract: A composite substrate for laser devices is disclosed having improved wave guiding properties, improved lattice matching, improved thermal expansion matching, and improved thermal conductivity. The composite substrate has an intermediate layer formed on a support substrate, and a seed layer formed on the intermediate layer. An active device layer is grown or attached to the seed layer, or to a light confinement layer on the seed layer. The intermediate layer may be formed directly on the support layer, or may be formed by thinning an attached wafer of the intermediate material, which is then thinned to a desired thickness.
    Type: Grant
    Filed: September 21, 2009
    Date of Patent: April 8, 2014
    Assignee: Soitec
    Inventors: Chantal Arena, Christiaan J. Werkhoven
  • Patent number: 8637383
    Abstract: Methods of fabricating semiconductor structures include forming a plurality of openings extending through a semiconductor material and at least partially through a metal material and deforming the metal material to relax a remaining portion of the semiconductor material. The metal material may be deformed by exposing the metal material to a temperature sufficient to alter (i.e., increase) its ductility. The metal material may be formed from one or more of hafnium, zirconium, yttrium, and a metallic glass. Another semiconductor material may be deposited over the remaining portions of the semiconductor material, and a portion of the metal material may be removed from between each of the remaining portions of the semiconductor material. Semiconductor structures may be formed using such methods.
    Type: Grant
    Filed: December 23, 2010
    Date of Patent: January 28, 2014
    Assignee: Soitec
    Inventor: Christiaan J. Werkhoven
  • Publication number: 20130295708
    Abstract: Methods of depositing a III-V semiconductor material on a substrate include sequentially introducing a gaseous precursor of a group III element and a gaseous precursor of a group V element to the substrate by altering spatial positioning of the substrate with respect to a plurality of gas columns. For example, the substrate may be moved relative to a plurality of substantially aligned gas columns, each disposing a different precursor. Thermalizing gas injectors for generating the precursors may include an inlet, a thermalizing conduit, a liquid container configured to hold a liquid reagent therein, and an outlet. Deposition systems for forming one or more III-V semiconductor materials on a surface of the substrate may include one or more such thermalizing gas injectors configured to direct the precursor to the substrate via the plurality of gas columns.
    Type: Application
    Filed: July 2, 2013
    Publication date: November 7, 2013
    Inventor: Christiaan J. Werkhoven
  • Patent number: 8574968
    Abstract: This invention provides methods for fabricating substantially continuous layers of a group III nitride semiconductor material having low defect densities and optionally having a selected crystal polarity. The methods include epitaxial growth nucleating and/or seeding on the upper portions of a plurality of pillars/islands of a group III nitride material that are irregularly arranged on a template structure. The upper portions of the islands have low defect densities and optionally have a selected crystal polarity. The invention also includes template structures having a substantially continuous layer of a masking material through which emerge upper portions of the pillars/islands. The invention also includes such template structures. The invention can be applied to a wide range of semiconductor materials, both elemental semiconductors, e.g., combinations of Si (silicon) with strained Si (sSi) and/or Ge (germanium), and compound semiconductors, e.g.
    Type: Grant
    Filed: July 25, 2008
    Date of Patent: November 5, 2013
    Assignees: Soitec, Arizona Board of Regents for and on Behalf of Arizona State University
    Inventors: Chantal Arena, Christiaan J. Werkhoven, Ronald Thomas Bertram, Jr., Ed Lindow, Subhash Mahajan, Ranjan Datta, Rahul Ajay Trivedi, Ilsu Han
  • Publication number: 20130234148
    Abstract: Methods of fabricating semiconductor structures include the formation of molybdenum nitride at one or more surfaces of a substrate comprising molybdenum, and providing a layer of III-V semiconductor material such as GaN over the substrate. Semiconductor structures formed by methods described herein may include a substrate comprising molybdenum, molybdenum nitride at one or more surfaces of the substrate, and a layer of GaN bonded to the molybdenum nitride.
    Type: Application
    Filed: March 9, 2012
    Publication date: September 12, 2013
    Applicant: SOITEC
    Inventor: Christiaan J. Werkhoven
  • Patent number: 8486193
    Abstract: Methods of depositing a III-V semiconductor material on a substrate include sequentially introducing a gaseous precursor of a group III element and a gaseous precursor of a group V element to the substrate by altering spatial positioning of the substrate with respect to a plurality of gas columns. For example, the substrate may be moved relative to a plurality of substantially aligned gas columns, each disposing a different precursor. Thermalizing gas injectors for generating the precursors may include an inlet, a thermalizing conduit, a liquid container configured to hold a liquid reagent therein, and an outlet. Deposition systems for forming one or more III-V semiconductor materials on a surface of the substrate may include one or more such thermalizing gas injectors configured to direct the precursor to the substrate via the plurality of gas columns.
    Type: Grant
    Filed: January 25, 2012
    Date of Patent: July 16, 2013
    Assignee: Soitec
    Inventor: Christiaan J. Werkhoven
  • Publication number: 20130161636
    Abstract: Methods for fabricating a semiconductor substrate include forming a first substrate layer over a surface of a first semiconductor layer, and thermally spraying a second substrate layer on a side of the first substrate layer opposite the first semiconductor layer. At least one additional semiconductor layer is epitaxially grown over the first semiconductor layer on a side thereof opposite the first substrate layer. At least one of the first substrate layer and the second substrate layer may be formulated to exhibit a Coefficient of Thermal Expansion (CTE) closely matching a CTE of at least one of the first semiconductor layer and the at least one additional semiconductor layer. Semiconductor structures are fabricated using such methods.
    Type: Application
    Filed: December 23, 2011
    Publication date: June 27, 2013
    Applicant: SOITEC
    Inventors: Christiaan J. Werkhoven, Chantal Arena