Abstract: The invention concerns an instructions sequencer for a microprocessor, the sequencer comprising an instructions decoding unit followed by a unit for determining the steps which defines the cycle instants at which must be activated the different function controls issuing from the sequencer, this step determination unit being produced in a particularly simple manner with a matrix of transistors in lines and columns, the transistors of one line being in series and the transistors of a column all being controlled by the same clock step, among the transistors, certain (T1) are depleted and are thus conductive whatever the clock step, while others are enriched and are only conductive during the step corresponding to their column.

Abstract: The invention concerns an instructions sequencer for microprocessor wherein the sequencer presents an architecture, a circuit conception and a presents that improves the compacity and facilitates conception and adaptation operations to different instructions sets, the sequencer having a line and column architecture and very widely produced in the form of a transistor and capacitor matrix, functioning with decoding transistors, preload transistors and a matrix for defining the phases of operating cycles.