Abstract: The disclosure provides a narrowband filter coupled to a signal path of a first system. The narrowband filter includes a first frequency converter, an integrator, and a second frequency converter coupled to each other in a sequence. The first frequency converter has a first input terminal receiving an input signal from the first system. The narrowband filter also includes a current generator. The current generator has a first terminal coupled to the input signal, a second terminal coupled to a first voltage, and a control terminal coupled to an output terminal of the second frequency converter. The narrowband filter dynamically adjusts a current being drawn from the signal path of the first system, as to detect and eliminate the frequency band of the unwanted signal generated by an influence of a second system close to the first system.

Abstract: The disclosure provides a narrowband filter coupled to a signal path of a first system. The narrowband filter includes a first frequency converter, an integrator, and a second frequency converter coupled to each other in a sequence. The first frequency converter has a first input terminal receiving an input signal from the first system. The narrowband filter also includes a current generator. The current generator has a first terminal coupled to the input signal, a second terminal coupled to a first voltage, and a control terminal coupled to an output terminal of the second frequency converter. The narrowband filter dynamically adjusts a current being drawn from the signal path of the first system, as to detect and eliminate the frequency band of the unwanted signal generated by an influence of a second system close to the first system.

Abstract: The disclosure provided a low noise block converter for converting RF signal received from a satellite into IF signal, where the image rejection of the RF signal is performed in two stages through a low noise amplifier (LNA) integrated circuit (IC). The disclosure reduced the number of discrete components by integrating electronic components onto one integrated circuit (or chip), and at the same, improves the noise figure of the LNB converter. The LNB IC comprises LNA circuits, RF path selector, and signal downconverter, where the image rejection is performed by a combination of the LNA circuits and the signal downconverter.

Abstract: A system and a method for constructing a signal integrity supervisor capable of both detecting and triggering an appropriate response when transmit path signals indicate a potential damaging transmitter operating mode. The system and method of the present invention takes advantage of the inherent property of a Delta-Sigma Modulator (DSM) which makes the probability of encountering a long string of consecutive ones or zeroes during nominal operation very small. The signal integrity supervisor ensures safe transmitter operation by monitoring the data and the clock inputs to a digital to analog converter. The system may comprise a data signal supervisor and a clock signal supervisor. The data supervisor may comprise a comparator and a counter and may be configured to power down a line driver upon detecting a data stream having a continuous voltage level.

Abstract: A system and a method for constructing a signal integrity supervisor capable of both detecting and triggering an appropriate response when transmit path signals indicate a potential damaging transmitter operating mode. The system and method of the present invention takes advantage of the inherent property of a Delta-Sigma Modulator (DSM) which makes the probability of encountering a long string of consecutive ones or zeroes during nominal operation very small. The signal integrity supervisor ensures safe transmitter operation by monitoring the data and the clock inputs to a digital to analog converter. The system may comprise a data signal supervisor and a clock signal supervisor. The data supervisor may comprise a comparator and a counter and may be configured to power down a line driver upon detecting a data stream having a continuous voltage level.

Abstract: An analog front-end circuit and method that supports multiple digital subscriber line (DSL) standards, including asymmetric digital subscriber line (ADSL) and very-high speed digital subscriber line (VDSL) is disclosed. The circuit incorporates multiple circuit blocks that can be selectively included into the transmit and receive paths of a DSL signal. It also permits selectable gain settings for signal amplifiers, and frequency bandwidth for signal filters that may be included in the transmit and receive paths. The receive path includes an analog-to-digital converter (ADC) that operates close to and exceeds the Nyquist sampling rate.

Abstract: A single unified digital subscriber line (DSL) transceiver can be used for DSL applications, can be integrated on a single board or chip, or within a less board space. An embodiment of the unified DSL transceiver comprises a transmit circuit coupled to a line driver/transformer circuit. The line driver/transformer circuit is coupled to a receive circuit that comprises a switching circuit. A signal is transmitted from the transmit circuit to the line driver/transformer circuit; the switching circuit is configured based on DSL applications, and the signal is propagated from the line driver/transformer circuit to a line.

Abstract: A system and a method for constructing a signal integrity supervisor capable of both detecting and triggering an appropriate response when transmit path signals indicate a potential damaging transmitter operating mode. The system and method of the present invention takes advantage of the inherent property of a Delta-Sigma Modulator (DSM) which makes the probability of encountering a long string of consecutive ones or zeroes during nominal operation very small. The signal integrity supervisor ensures safe transmitter operation by monitoring the data and the clock inputs to a digital to analog converter. The system may comprise a data signal supervisor and a clock signal supervisor. The data supervisor may comprise a comparator and a counter and may be configured to power down a line driver upon detecting a data stream having a continuous voltage level.

Abstract: A system and a method for constructing a signal integrity supervisor capable of both detecting and triggering an appropriate response when transmit path signals indicate a potential damaging transmitter operating mode. The system and method of the present invention takes advantage of the inherent property of a Delta-Sigma Modulator (DSM) which makes the probability of encountering a long string of consecutive ones or zeroes during nominal operation very small. The signal integrity supervisor ensures safe transmitter operation by monitoring the data and the clock inputs to a digital to analog converter. The system may comprise a data signal supervisor and a clock signal supervisor. The data supervisor may comprise a comparator and a counter and may be configured to power down a line driver upon detecting a data stream having a continuous voltage level.

Abstract: A system and a method for constructing a signal integrity supervisor capable of both detecting and triggering an appropriate response when transmit path signals indicate a potential damaging transmitter operating mode. The system and method of the present invention takes advantage of the inherent property of a Delta-Sigma Modulator (DSM) which makes the probability of encountering a long string of consecutive ones or zeroes during nominal operation very small. The signal integrity supervisor ensures safe transmitter operation by monitoring the data and the clock inputs to a digital to analog converter. The system may comprise a data signal supervisor and a clock signal supervisor. The data supervisor may comprise a comparator and a counter and may be configured to power down a line driver upon detecting a data stream having a continuous voltage level.