Abstract: A method for manufacturing a carrier substrate on a semiconductor wafer that includes a front side and a rear side, the front side being situated opposite the rear side, the front side representing a structured semiconductor wafer side including contact areas. The method includes the following steps: applying at least one first layer to the front side with the aid of printing technology, the at least one first layer including a first material that is water-insoluble, and curing the at least one first layer with the aid of UV radiation, thermally or with the aid of sintering.

Abstract: An electronic circuit module. The module has a multilayered LTCC circuit carrier made of structured inorganic substrate layers, which have electrical and/or thermal conduction structures for electrical and/or thermal conduction, at least one electronic component, which is arranged on a first side and/or an opposite second side of the LTCC circuit carrier, and at least one SiC power semiconductor. The at least one SiC power semiconductor is embedded in the multilayered LTCC circuit carrier and enclosed at least on three sides by the multilayered LTCC circuit carrier. Connection contacts of the SiC power semiconductor contact the electrical and/or thermal conduction structures of the LTCC circuit carrier.

Abstract: A wheel suspension system (101) with at least one wheel support (103), first and second coupling rods (105, 107) and at least one track rod (109). The first and second coupling rods (105, 107) are connected to one another in an articulated manner. The second coupling rod (107) and the wheel support (103) are connected to one another in an articulated manner. The track rod (109) is designed to apply a steering torque to the first coupling rod (105). The steering torque is transmitted from the first coupling rod (105), via the second coupling rod (107), to the wheel support (103). The wheel suspension system has at least one suspension link (111) which is mounted, in an articulated manner, on a vehicle body or chassis and is articulated to the wheel support (103). The suspension link (111) and the first coupling rod (105) are articulated to one another.

Abstract: A wheel suspension system (101) with at least one wheel support (103), first and second coupling rods (105, 107) and at least one track rod (109). The first and second coupling rods (105, 107) are connected to one another in an articulated manner. The second coupling rod (107) and the wheel support (103) are connected to one another in an articulated manner. The track rod (109) is designed to apply a steering torque to the first coupling rod (105). The steering torque is transmitted from the first coupling rod (105), via the second coupling rod (107), to the wheel support (103). The wheel suspension system has at least one suspension link (111) which is mounted, in an articulated manner, on a vehicle body or chassis and is articulated to the wheel support (103). The suspension link (111) and the first coupling rod (105) are articulated to one another.

Abstract: A semiconductor device having a trench gate and method for manufacturing is disclosed. One embodiment includes a first semiconductor area and a second semiconductor area, a semiconductor body area between the first semiconductor area and the second semiconductor area, and a gate arranged in a trench and separated from the semiconductor body by an insulation layer, wherein the trench has a top trench portion which extends from the semiconductor surface at least to a depth which is greater than a depth of the first semiconductor area, wherein the trench further has a bottom trench portion extending subsequent to the top trench portion at least up to the second semiconductor area, and wherein the top trench portion has a first lateral dimension and the bottom trench portion has a second lateral dimension which is greater than the first lateral dimension.

Abstract: An electrical circuit device includes a semiconductor component which has power terminals and a control terminal electrically insulated from the power terminals, for applying a control voltage, and a control terminal contact surface for contacting the control terminal for measuring the electrical behavior of the semiconductor component. A connection device is provided, via which the control terminal is electrically connectable to a series device, the connection device being transferable from a nonconductive state into a conductive state, in which the control terminal is connected to the series device.

Abstract: A power switch component having a semiconductor switch and a contacting applied to a contact zone of the semiconductor switch is introduced. The contact zone has a semiconductor layer and a metal plating applied to the semiconductor layer. The semiconductor layer has at least one conducting region and at least one non-conducting region situated directly under the metal plating.

Abstract: An electrical circuit device includes a semiconductor component which has power terminals and a control terminal electrically insulated from the power terminals, for applying a control voltage, and a control terminal contact surface for contacting the control terminal for measuring the electrical behavior of the semiconductor component. A connection device is provided, via which the control terminal is electrically connectable to a series device, the connection device being transferable from a nonconductive state into a conductive state, in which the control terminal is connected to the series device.

Abstract: A semiconductor device having a trench gate and method for manufacturing is disclosed. One embodiment includes a first semiconductor area and a second semiconductor area, a semiconductor body area between the first semiconductor area and the second semiconductor area, and a gate arranged in a trench and separated from the semiconductor body by an insulation layer, wherein the trench has a top trench portion which extends from the semiconductor surface at least to a depth which is greater than a depth of the first semiconductor area, wherein the trench further has a bottom trench portion extending subsequent to the top trench portion at least up to the second semiconductor area, and wherein the top trench portion has a first lateral dimension and the bottom trench portion has a second lateral dimension which is greater than the first lateral dimension.

Abstract: A power switch component having a semiconductor switch and a contacting applied to a contact zone of the semiconductor switch is introduced. The contact zone has a semiconductor layer and a metal plating applied to the semiconductor layer. The semiconductor layer has at least one conducting region and at least one non-conducting region situated directly under the metal plating.

Abstract: A semiconductor device is disclosed. In one embodiment, the semiconductor device includes a channel formation region formed on a side wall, having a mixture of a first semiconductor material with a first lattice constant, a second semiconductor material and carbon, the second semiconductor material having a second lattice constant differing from the first lattice constant.

Abstract: The application relates to a semiconductor device made of silicon with regionally reduced band gap and a process for the production of same. One embodiment provides a semiconductor device including a body zone, a drain zone and a source zone. A gate extends between the source zone and the drain zone. A reduced band gap region is provided in a region of the body zone, made of at least ternary compound semiconductor material.

Abstract: A semiconductor device is disclosed. In one embodiment, the semiconductor device includes a channel formation region formed on a side wall and includes a mixture of a first semiconductor material, having a first lattice constant and a second semiconductor material with a second lattice constant differing from the first lattice constant, wherein a proportion of the second semiconductor material increases with increasing distance from the side wall.

Abstract: The application relates to a semiconductor device made of silicon with regionally reduced band gap and a process for the production of same. One embodiment provides a semiconductor device including a body zone, a drain zone and a source zone. A gate extends between the source zone and the drain zone. A reduced band gap region is provided in a region of the body zone, made of at least ternary compound semiconductor material.

Abstract: A semiconductor device is disclosed. In one embodiment, the semiconductor device includes a channel formation region formed on a side wall, having a mixture of a first semiconductor material with a first lattice constant, a second semiconductor material and carbon, the second semiconductor material having a second lattice constant differing from the first lattice constant.

Abstract: A semiconductor device is disclosed. In one embodiment, the semiconductor device includes a channel formation region formed on a side wall and includes a mixture of a first semiconductor material, having a first lattice constant and a second semiconductor material with a second lattice constant differing from the first lattice constant, wherein a proportion of the second semiconductor material increases with increasing distance from the side wall.

Abstract: A semiconductor device having a trench gate and method for manufacturing is disclosed. One embodiment includes a first semiconductor area and a second semiconductor area, a semiconductor body area between the first semiconductor area and the second semiconductor area, and a gate arranged in a trench and separated from the semiconductor body by an insulation layer, wherein the trench has a top trench portion which extends from the semiconductor surface at least to a depth which is greater than a depth of the first semiconductor area, wherein the trench further has a bottom trench portion extending subsequent to the top trench portion at least up to the second semiconductor area, and wherein the top trench portion has a first lateral dimension and the bottom trench portion has a second lateral dimension which is greater than the first lateral dimension.