Abstract: A Universal Serial Bus (USB) Type-C and power delivery port with scalable power architecture is disclosed. In one aspect, at least two circuits for a USB port are consolidated into a single integrated circuit (IC). At least one of the at least two circuits is part of a Type-C port controller (TCPC) group of circuits including sensors associated with detecting whether a voltage and current are present at pins of a USB receptacle. At least the other one of the at least two circuits is selected from a battery-related group of circuits including a battery charging circuit, an over-voltage protection circuit, and a conditioning circuit. The more circuitry integrated into the single IC the more readily scalable the end product is for a multi-port device. Additional circuitry such as a light emitting diode (LED) driver may also be included in the single IC.

Abstract: A Universal Serial Bus (USB) Type-C and power delivery port with scalable power architecture is disclosed. In one aspect, at least two circuits for a USB port are consolidated into a single integrated circuit (IC). At least one of the at least two circuits is part of a Type-C port controller (TCPC) group of circuits including sensors associated with detecting whether a voltage and current are present at pins of a USB receptacle. At least the other one of the at least two circuits is selected from a battery-related group of circuits including a battery charging circuit, an over-voltage protection circuit, and a conditioning circuit. The more circuitry integrated into the single IC the more readily scalable the end product is for a multi-port device. Additional circuitry such as a light emitting diode (LED) driver may also be included in the single IC.

Abstract: A Universal Serial Bus (USB) Type-C and power delivery port with scalable power architecture is disclosed. In one aspect, at least two circuits for a USB port are consolidated into a single integrated circuit (IC). At least one of the at least two circuits is part of a Type-C port controller (TCPC) group of circuits including sensors associated with detecting whether a voltage and current are present at pins of a USB receptacle. At least the other one of the at least two circuits is selected from a battery-related group of circuits including a battery charging circuit, an over-voltage protection circuit, and a conditioning circuit. The more circuitry integrated into the single IC the more readily scalable the end product is for a multi-port device. Additional circuitry such as a light emitting diode (LED) driver may also be included in the single IC.

Abstract: Universal Serial Bus (USB) cable type detection and control techniques are disclosed. In an exemplary aspect, a device connected to a cable detects whether the cable is a legacy cable (i.e., a Type-A to Type-C cable). If the cable is a legacy cable, the device determines an appropriate current to draw based on whether the cable is compliant with the USB Type-C specification or non-compliant. Additional exemplary aspects of the present disclosure determine whether a connector adaptor has been put on a legacy cable and determines an appropriate current to draw based on the capabilities of the legacy cable. Still further aspects of the present disclosure evaluate not only the cable to see if the cable limits the current draw, but also evaluate a device at a distal end of the cable to verify if and how current may be drawn by such remote device from a mobile terminal.

Abstract: Systems and methods for reuse of battery pack-side current and voltage sensing are disclosed. By reusing elements within a battery pack, a battery field effect transistor (FET) within a power management integrated circuit (PMIC) may be eliminated or at least bypassed. In a first aspect, a current mirror is coupled to a charge protection circuit in the battery pack to capture a sensed current. Likewise, a voltage sensor captures a voltage level for a charging path. Current and voltage are output to the PMIC for use in regulating a buck charger. In a second aspect, current data and voltage data are collected and digitized before being sent to the PMIC for use in regulating the buck charger.

Abstract: Systems and methods for reuse of battery pack-side current and voltage sensing are disclosed. By reusing elements within a battery pack, a battery field effect transistor (FET) within a power management integrated circuit (PMIC) may be eliminated or at least bypassed. In a first aspect, a current mirror is coupled to a charge protection circuit in the battery pack to capture a sensed current. Likewise, a voltage sensor captures a voltage level for a charging path. Current and voltage are output to the PMIC for use in regulating a buck charger. In a second aspect, current data and voltage data are collected and digitized before being sent to the PMIC for use in regulating the buck charger.

Abstract: Systems and methods for port management are disclosed. In one aspect, the system may consolidate port management functions as well as power conversion, protection features, and signal conditioning circuitry into a single integrated circuit (IC) for a device without a battery. Further exemplary aspects allow for arbitration between ports to handle power supply versus power sink functions. Still further exemplary aspects provide an indication when a weak power source is coupled to the computing device to alert a user that the weak power source may not provide sufficient power for full operation. Such consolidated functionality allows a single form factor to be used for all ports whether the ports are used as a power port or an output port. Further, such consolidated functionality helps mitigate possible damage caused by improper activity.

Abstract: Over-voltage protection systems and methods are disclosed. In one aspect, a biasing circuit is added to a pre-existing clamp required by the Universal Serial Bus (USB) Type-C specification at a configuration control (CC) pin. The biasing circuit turns the pre-existing clamp into an adjustable clamp that dynamically adjusts to over-voltage conditions. In an exemplary aspect, the biasing circuit may include a biasing field effect transistor (FET) and a pair of switches that selectively couple the pre-existing clamp and the biasing FET to fixed voltages such that the CC pin is maintained at an acceptable voltage. In another exemplary aspect, the biasing circuit may omit the biasing FET and rely on two switches that selectively couple the pre-existing clamp to fixed voltages such that the CC pin is maintained at an acceptable voltage.

Abstract: An apparatus is disclosed for open-loop limiting of a charging phase pulsewidth. An example apparatus includes an input node, an output node coupled to a battery, a flying capacitor coupled to the output node, a driver circuit, a charging circuit, and an open-loop charging phase pulsewidth limiter coupled to the driver circuit and the charging circuit. The driver circuit generates a charging phase signal based on a clock signal. Using at least one switch that is coupled between the input node and the flying capacitor, the charging circuit connects or disconnects the flying capacitor to or from the input node based on the charging phase signal. The open-loop charging phase pulsewidth limiter monitors for at least one limit event associated with charging the battery with the flying capacitor. Responsive to detection of the limit event, the open-loop charging phase pulsewidth limiter limits a pulsewidth of the charging phase signal.

Abstract: Systems and methods for port management are disclosed. In one aspect, the system may consolidate port management functions as well as power conversion, protection features, and signal conditioning circuitry into a single integrated circuit (IC) for a device without a battery. Further exemplary aspects allow for arbitration between ports to handle power supply versus power sink functions. Still further exemplary aspects provide an indication when a weak power source is coupled to the computing device to alert a user that the weak power source may not provide sufficient power for full operation. Such consolidated functionality allows a single form factor to be used for all ports whether the ports are used as a power port or an output port. Further, such consolidated functionality helps mitigate possible damage caused by improper activity.

Abstract: A Universal Serial Bus (USB) Type-C and power delivery port with scalable power architecture is disclosed. In one aspect, at least two circuits for a USB port are consolidated into a single integrated circuit (IC). At least one of the at least two circuits is part of a Type-C port controller (TCPC) group of circuits including sensors associated with detecting whether a voltage and current are present at pins of a USB receptacle. At least the other one of the at least two circuits is selected from a battery-related group of circuits including a battery charging circuit, an over-voltage protection circuit, and a conditioning circuit. The more circuitry integrated into the single IC the more readily scalable the end product is for a multi-port device. Additional circuitry such as a light emitting diode (LED) driver may also be included in the single IC.

Abstract: Systems, methods, and apparatus for testing devices adapted for connection to other devices using universal serial bus (USB) are disclosed. Devices to be tested are caused to enter a special mode of operation when resistance measured at one or more terminals of a USB Type-C connector have values associated with the special mode of operation. One or more operations of the device are automatically initiated when the resistance coupled to the at least one terminal of the connector has a measured value that matches one of a set of resistance values maintained by the device. The one or more operations may include configuring a power management circuit based on the measured value, and entering a mode of operation that controls startup of at least one processor on the device when the measured value matches a first resistance value.

Abstract: Systems and methods for reuse of battery pack-side current and voltage sensing are disclosed. By reusing elements within a battery pack, a battery field effect transistor (FET) within a power management integrated circuit (PMIC) may be eliminated or at least bypassed. In a first aspect, a current mirror is coupled to a charge protection circuit in the battery pack to capture a sensed current. Likewise, a voltage sensor captures a voltage level for a charging path. Current and voltage are output to the PMIC for use in regulating a buck charger. In a second aspect, current data and voltage data are collected and digitized before being sent to the PMIC for use in regulating the buck charger.

Abstract: A Universal Serial Bus (USB) split cable is disclosed. In one aspect, the USB split cable provides a USB full-featured Type-C host plug for connecting to a USB Type-C receptacle in a USB host. In another aspect, the USB split cable provides a plurality of USB device plugs for connecting to a plurality of device clients, respectively. The plurality of USB device plugs can be configured individually with different data pin combinations to concurrently support different device clients. By providing the USB split cable, it is possible to support point-to-multipoint USB connection via the plurality of USB device plugs without a USB hub, thus improving mobility of the USB host while reducing costs and power consumption associated with the USB hub.

Abstract: Universal Serial Bus (USB) cable type detection and control techniques are disclosed. In an exemplary aspect, a device connected to a cable detects whether the cable is a legacy cable (i.e., a Type-A to Type-C cable). If the cable is a legacy cable, the device determines an appropriate current to draw based on whether the cable is compliant with the USB Type-C specification or non-compliant. Additional exemplary aspects of the present disclosure determine whether a connector adaptor has been put on a legacy cable and determines an appropriate current to draw based on the capabilities of the legacy cable. Still further aspects of the present disclosure evaluate not only the cable to see if the cable limits the current draw, but also evaluate a device at a distal end of the cable to verify if and how current may be drawn by such remote device from a mobile terminal.

Abstract: Multiple power chargers for mobile terminals are disclosed. In particularly contemplated aspects, a mobile terminal may include two charging circuits arranged serially, such that only one charging circuit charges a battery of the mobile terminal at a time. The serial arrangement allows consolidation of fuel gauge circuitry within one of the charging circuits. In a particularly contemplated aspect, a second charger is tied to a first charger at a system power node. The system power node is further tied to a top port of the second charger. A bottom port of the second charger is tied to a top port of the first charger. A bottom port of the first charger is tied to the battery of the mobile terminal. The fuel gauge circuitry may sense battery current using a known ON resistance of a field effect transistor (FET) of the first charger.

Abstract: Over-voltage protection systems and methods are disclosed. In one aspect, a biasing circuit is added to a pre-existing clamp required by the Universal Serial Bus (USB) Type-C specification at a configuration control (CC) pin. The biasing circuit turns the pre-existing clamp into an adjustable clamp that dynamically adjusts to over-voltage conditions. In an exemplary aspect, the biasing circuit may include a biasing field effect transistor (FET) and a pair of switches that selectively couple the pre-existing clamp and the biasing FET to fixed voltages such that the CC pin is maintained at an acceptable voltage. In another exemplary aspect, the biasing circuit may omit the biasing FET and rely on two switches that selectively couple the pre-existing clamp to fixed voltages such that the CC pin is maintained at an acceptable voltage.

Abstract: Systems, methods, and apparatus for testing devices adapted for connection to other devices using universal serial bus (USB) are disclosed. Devices to be tested are caused to enter a special mode of operation when a resistance measured across across two terminals of a USB Type-C connector has a value associated with the special mode of operation. One or more operations of the device are automatically initiated when the resistance between the two terminals has a measured value that matches one of a set of resistance values maintained by the device. The one or more operations may include configuring a power management circuit based on the measured value, and entering a special or factory boot mode that controls startup of at least one processor on the device based on the measured value. Each of the set of resistance values exceeds a minimum open-circuit resistance value specified for the connector.

Abstract: Systems, methods, and apparatus for testing devices adapted for connection to other devices using universal serial bus (USB) are disclosed. Devices to be tested are caused to enter a special mode of operation when resistance measured at one or more terminals of a USB Type-C connector have values associated with the special mode of operation. One or more operations of the device are automatically initiated when the resistance coupled to the at least one terminal of the connector has a measured value that matches one of a set of resistance values maintained by the device. The one or more operations may include configuring a power management circuit based on the measured value, and entering a mode of operation that controls startup of at least one processor on the device when the measured value matches a first resistance value.

Abstract: Systems, methods, and apparatus for testing devices adapted for connection to other devices using universal serial bus (USB) are disclosed. Devices to be tested are caused to enter a special mode of operation when a resistance measured across two terminals of a USB Type-C connector has a value associated with the special mode of operation. One or more operations of the device are automatically initiated when the resistance between the two terminals has a measured value that matches one of a set of resistance values maintained by the device. The one or more operations may include configuring a power management circuit based on the measured value, and entering a special or factory boot mode that controls startup of at least one processor on the device based on the measured value. Each of the set of resistance values exceeds a minimum open-circuit resistance value specified for the connector.