Abstract: The overload protection circuit 12 comprises a resistor bridge 20 with a low impedance sensing resistor r and high impedance resistors R1 to R4 which generates voltages Va and Vb at the inputs 32 and 34 of a comparator 22. Voltage Vb depend upon the value of the load current so that the comparator provides at its output 36 a control signal for opening the switching device 24 comprising a field effect transistor when the load current exceeds a maximum value. Resistor R5 reinforces the effect of the control signal. This circuit can be used in a system which comprises a central power supply unit 8 which powers a plurality of devices such as 4. The status of the circuit 12 is reported to the system 8 though line 14 and circuit 12 comprises a control circuit 26 which is responsive to set and reset control signals on lines 14 and 18 from the unit 8 to close or open the switch 26.

Abstract: A hot plug circuit insuring that the plugging of cards to a board is performed in the hot-plug mode when the cards are supplied from a common power supply located on one of the cards or on the board. This circuit (62) limits the surge current generated at the interconnection of first circuits (30) arranged on a first card (1) and powered by a supply device (2) providing a first supply voltage (ground) on a first supply line (36) and a second supply voltage (+V) on a second supply line (34), with second circuit (24) on a second card powered by the supply device (2) through a third supply line (74) and fourth supply line (76). The surge current results from the charge of a decoupling capacitor of capacitance Cd arranged on the second card between the third and fourth supply lines when the cards are interconnected through an interconnecting arrangement (14, 12, 22).

Abstract: A conversion system is disclosed for performing either an analog-to-digital A/D conversion associated with an amplification step or a digital-to-analog D/A conversion associated with an attenuation step. The system includes apparatus (115) for receiving a input digital word to be processed, i.e. converted into analog and then attenuated, and apparatus (165) for receiving a input analog value to be processed, i.e. amplified for scaling purposes and then converted into digital. It also includes a digital-to-analog D/A converter (110), an attenuator (120) for attenuating the analog output of D/A converter (110), and a comparator (150) for comparing the value of the input analog value to be processed and the output of said attenuator (120). The processing of the D/A-attenuation process is performed by both the D/A converter (110) and attenuator (120).

Abstract: A digital to analog converter for converting an N-bit digital word into its analog representation including means for splitting the N bits into n sections of N/n bits each. For instance a 12-bit word is split into an odd section and an even section which are processed independently and in parallel. This results in two partial results, V.sub.i and V.sub.p, respectively, representative of the odd and even bit sections. The last step of the conversion is the action of the two partial results V.sub.i and V.sub.p to provide the analog representation of the 12-bit word. Few operators are required to process each section because each bit is converted sequentially. This provides a low cost, compact and simple converter, moreover, since few operators are required, it may be advantageous to use high precision operators as disclosed.

Abstract: The circuit of the present invention detects variations of a current I.sub.L flowing in a telephone line LL. A low-value resistor r is connected in series with line LL. A constant voltage generator is connected across this resistor. The current Is applied to resistor r by the contant voltage generator varies as a function of I.sub.L. This being so, a measurement of the variations of Is will reflect variations of I.sub.L and, therefore, can be used to detect both amplitude and directional variations of I.sub.L.

Abstract: A line interface circuit for connecting the transmit and receive ports of a transmitter to transmit lines (LX) and receive lines (LR), respectively. The interface circuit includes a transistorized differential amplifier provided with two load circuits comprising resistors and diodes connected in series, and logic control means for selectively switching power to either load circuit. One of the load circuits drives the transmit line (LX) while the other drives the receive ports of the transmitter. Switching the load circuits makes it possible to use the interface circuit either to drive the transmit line (LX) or to loop the output signal from the transmitter back to the receive input thereof, while loading the transmit line (LX) with its characteristic impedance.

Abstract: Signals to the base of a bipolar transistor and to the gate of a parallel - connected FET are timed to turn on the two transistors simultaneously and to turn off the bipolar transistor before the FET. The shorter switching time of the FET is combined with the low resistance of the bipolar transistor to provide a switch that is particularly useful in a switched-type power supply with increased switched frequency.

Abstract: A circuit for interfacing an AF line to a central unit makes use of an RF transformer Tr. Said transformer is so arranged that the source AF signal to be transmitted modulates an RF carrier generated in a primary winding of the transformer and the resulting modulated signal in the secondary winding is demodulated before being transmitted to a line which is thereby linked to the source.