Patents by Inventor Christian Kampen
Christian Kampen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11145745Abstract: A method for producing a semiconductor component includes: providing a semiconductor body having a first dopant of a first conductivity type; forming a first trench in the semiconductor body starting from a first side; filling the first trench with a semiconductor filler material; forming a superjunction structure by introducing a second dopant of a second conductivity type into the semiconductor body, the semiconductor filler material being doped with the second dopant; forming a second trench in the semiconductor body starting from the first side; and forming a trench structure in the second trench.Type: GrantFiled: July 17, 2019Date of Patent: October 12, 2021Assignee: Infineon Technologies AGInventors: Till Schloesser, Christian Kampen, Andreas Meiser
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Patent number: 10985245Abstract: The disclosure relates to a semiconductor device including a first planar field effect transistor cell and a second planar field effect transistor cell. The first planar field effect transistor cell and the second planar field effect transistor cell are electrically connected in parallel and each include a drain extension region between a channel region and a drain terminal at a first surface of a semiconductor body. A gate electrode of the first field effect transistor cell is electrically connected to a source terminal, and a gate electrode of the second field effect transistor cell is connected to a gate terminal that is electrically isolated from the source terminal.Type: GrantFiled: December 14, 2018Date of Patent: April 20, 2021Assignee: Infineon Technologies AGInventors: Andreas Meiser, Christian Kampen
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Publication number: 20200027969Abstract: A method for producing a semiconductor component includes: providing a semiconductor body having a first dopant of a first conductivity type; forming a first trench in the semiconductor body starting from a first side; filling the first trench with a semiconductor filler material; forming a superjunction structure by introducing a second dopant of a second conductivity type into the semiconductor body, the semiconductor filler material being doped with the second dopant; forming a second trench in the semiconductor body starting from the first side; and forming a trench structure in the second trench.Type: ApplicationFiled: July 17, 2019Publication date: January 23, 2020Inventors: Till Schloesser, Christian Kampen, Andreas Meiser
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Patent number: 10453915Abstract: A semiconductor device includes a semiconductor body having a semiconductor substrate of a first conductivity type and a semiconductor layer of the first conductivity type on the substrate. A trench structure extends into the semiconductor body from a first surface and includes a gate electrode and at least one field electrode arranged between the gate electrode and a bottom side of the trench structure. A body region adjoins the trench structure and laterally extends from a transistor cell area into an edge termination area. A pn junction is between the body region and semiconductor layer. A doping concentration of at least one of the body region and semiconductor layer is lowered at a lateral end of the pn junction in the edge termination area compared to a doping concentration of the at least one of the body region and semiconductor layer at the pn junction in the transistor cell area.Type: GrantFiled: March 30, 2018Date of Patent: October 22, 2019Assignee: Infineon Technologies AGInventors: Andreas Meiser, Karl-Heinz Bach, Christian Kampen, Dietmar Kotz, Andrew Christopher Graeme Wood, Markus Zundel
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Publication number: 20190189742Abstract: The disclosure relates to a semiconductor device including a first planar field effect transistor cell and a second planar field effect transistor cell. The first planar field effect transistor cell and the second planar field effect transistor cell are electrically connected in parallel and each include a drain extension region between a channel region and a drain terminal at a first surface of a semiconductor body. A gate electrode of the first field effect transistor cell is electrically connected to a source terminal, and a gate electrode of the second field effect transistor cell is connected to a gate terminal that is electrically isolated from the source terminal.Type: ApplicationFiled: December 14, 2018Publication date: June 20, 2019Inventors: Andreas Meiser, Christian Kampen
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Patent number: 10205019Abstract: One embodiment of a semiconductor device includes a fin at a first side of a semiconductor body, a body region of a second conductivity type in at least a part of the fin, a drain extension region of a first conductivity type, a source region and a drain region of the first conductivity type, a source contact in contact with the source region, and a gate structure adjoining opposing walls of the fin. The source contact extends along a vertical direction along the source region. The source contact includes a conductive material and is disposed in a trench in the semiconductor body, adjacent to the source region. The body region and the drain extension region are arranged one after another between the source region and the drain region.Type: GrantFiled: May 24, 2016Date of Patent: February 12, 2019Assignee: Infineon Technologies Austria AGInventors: Andreas Meiser, Christian Kampen
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Publication number: 20180286944Abstract: A semiconductor device includes a semiconductor body having a semiconductor substrate of a first conductivity type and a semiconductor layer of the first conductivity type on the substrate. A trench structure extends into the semiconductor body from a first surface and includes a gate electrode and at least one field electrode arranged between the gate electrode and a bottom side of the trench structure. A body region adjoins the trench structure and laterally extends from a transistor cell area into an edge termination area. A pn junction is between the body region and semiconductor layer. A doping concentration of at least one of the body region and semiconductor layer is lowered at a lateral end of the pn junction in the edge termination area compared to a doping concentration of the at least one of the body region and semiconductor layer at the pn junction in the transistor cell area.Type: ApplicationFiled: March 30, 2018Publication date: October 4, 2018Inventors: Andreas Meiser, Karl-Heinz Bach, Christian Kampen, Dietmar Kotz, Andrew Christopher Graeme Wood, Markus Zundel
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Patent number: 9960268Abstract: A semiconductor device includes a drift region of a device structure arranged in a semiconductor layer. The drift region includes at least one first drift region portion and at least one second drift region portion. A majority of dopants within the first drift region portion are a first species of dopants having a diffusivity less than a diffusivity of phosphor within the semiconductor layer. Further, a majority of dopants within the second drift region portion are a second species of dopants. Additionally, the semiconductor device includes a trench extending from a surface of the semiconductor layer into the semiconductor layer. A vertical distance of a border between the first drift region portion and the second drift region portion to the surface of the semiconductor layer is larger than 0.5 times a maximal depth of the trench and less than 1.5 times the maximal depth of the trench.Type: GrantFiled: October 7, 2016Date of Patent: May 1, 2018Assignee: Infineon Technologies AGInventors: Markus Zundel, Christian Kampen, Jacob Tillmann Ludwig
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Patent number: 9812563Abstract: A transistor cell includes, in a semiconductor body, a drift region of a first doping type, a source region of the first doping type, a body region of a second doping type, and a drain region of the first doping type. The body region is arranged between the source and drift regions. The drift region is arranged between the body and drain regions. A gate electrode is adjacent the body region and dielectrically insulated from the body region by a gate dielectric, and a field electrode is dielectrically insulated from the drift region by a field electrode dielectric. The drift region includes an avalanche region having a higher doping concentration than sections of the drift region adjacent the avalanche region and which is spaced apart from the field electrode dielectric in a direction perpendicular to the current flow direction. The field electrode is arranged in a needle-shaped trench.Type: GrantFiled: June 14, 2016Date of Patent: November 7, 2017Assignee: Infineon Technologies AGInventors: Ralf Siemieniec, Markus Zundel, Karl-Heinz Bach, Franz Hirler, Christian Kampen, Werner Schustereder
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Patent number: 9698228Abstract: Disclosed is a transistor device. The transistor device includes a plurality of field structures which define a plurality of semiconductor mesa regions in a semiconductor body, and each of which comprises a field electrode and a field electrode dielectric; a plurality of gate structures in each semiconductor mesa region, wherein each gate structure comprises a gate electrode and a gate dielectric, and is arranged in a trench of the semiconductor mesa region; a plurality of body regions, a plurality of source regions, and a drift region. Each body region adjoins the gate dielectric of at least one of the plurality of gate structures, and is located between one of the plurality of source regions and the drift region.Type: GrantFiled: December 21, 2015Date of Patent: July 4, 2017Assignee: Infineon Technologies AGInventors: Christian Kampen, Markus Zundel
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Publication number: 20170110572Abstract: A semiconductor device includes a drift region of a device structure arranged in a semiconductor layer. The drift region includes at least one first drift region portion and at least one second drift region portion. A majority of dopants within the first drift region portion are a first species of dopants having a diffusivity less than a diffusivity of phosphor within the semiconductor layer. Further, a majority of &pants within the second drift region portion are a second species of dopants. Additionally, the semiconductor device includes a trench extending from a surface of the semiconductor layer into the semiconductor layer. A vertical distance of a border between the first drift region portion and the second drift region portion to the surface of the semiconductor layer is larger than 0.5 times a maximal depth of the trench and less than 1.5 times the maximal depth of the trench.Type: ApplicationFiled: October 7, 2016Publication date: April 20, 2017Inventors: Markus Zundel, Christian Kampen, Jacob Tillmann Ludwig
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Publication number: 20160365441Abstract: A transistor cell includes, in a semiconductor body, a drift region of a first doping type, a source region of the first doping type, a body region of a second doping type, and a drain region of the first doping type. The body region is arranged between the source and drift regions. The drift region is arranged between the body and drain regions. A gate electrode is adjacent the body region and dielectrically insulated from the body region by a gate dielectric, and a field electrode is dielectrically insulated from the drift region by a field electrode dielectric. The drift region includes an avalanche region having a higher doping concentration than sections of the drift region adjacent the avalanche region and which is spaced apart from the field electrode dielectric in a direction perpendicular to the current flow direction. The field electrode is arranged in a needle-shaped trench.Type: ApplicationFiled: June 14, 2016Publication date: December 15, 2016Inventors: Ralf Siemieniec, Markus Zundel, Karl-Heinz Bach, Franz Hirler, Christian Kampen, Werner Schustereder
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Publication number: 20160268425Abstract: One embodiment of a semiconductor device includes a fin at a first side of a semiconductor body, a body region of a second conductivity type in at least a part of the fin, a drain extension region of a first conductivity type, a source region and a drain region of the first conductivity type, a source contact in contact with the source region, and a gate structure adjoining opposing walls of the fin. The source contact extends along a vertical direction along the source region. The source contact includes a conductive material and is disposed in a trench in the semiconductor body, adjacent to the source region. The body region and the drain extension region are arranged one after another between the source region and the drain region.Type: ApplicationFiled: May 24, 2016Publication date: September 15, 2016Inventors: Andreas Meiser, Christian Kampen
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Publication number: 20160181417Abstract: Disclosed is a transistor device. The transistor device includes a plurality of field structures which define a plurality of semiconductor mesa regions in a semiconductor body, and each of which comprises a field electrode and a field electrode dielectric; a plurality of gate structures in each semiconductor mesa region, wherein each gate structure comprises a gate electrode and a gate dielectric, and is arranged in a trench of the semiconductor mesa region; a plurality of body regions, a plurality of source regions, and a drift region. Each body region adjoins the gate dielectric of at least one of the plurality of gate structures, and is located between one of the plurality of source regions and the drift region.Type: ApplicationFiled: December 21, 2015Publication date: June 23, 2016Inventors: Christian Kampen, Markus Zundel
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Patent number: 9356148Abstract: One embodiment of a semiconductor device includes a fin at a first side of a semiconductor body, a body region of a second conductivity type in at least a part of the fin, a drain extension region of a first conductivity type, a source region and a drain region of the first conductivity type, a source contact in contact with the source region, the source contact extending along a vertical direction along the source region, and a gate structure adjoining opposing walls of the fin. The body region and the drain extension region are arranged one after another between the source region and the drain region.Type: GrantFiled: March 9, 2015Date of Patent: May 31, 2016Assignee: Infineon Technologies Austria AGInventors: Andreas Meiser, Christian Kampen
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Patent number: 9269592Abstract: A transistor is formed by forming a ridge including a first ridge portion and a second ridge portion in a semiconductor substrate, the ridge extending along a first direction, forming a source region, a drain region, a channel region, a drain extension region and a gate electrode adjacent to the channel region, in the ridge, doping the channel region with dopants of a first conductivity type, and doping the source region and the drain region with dopants of a second conductivity type. Forming the drain extension region includes forming a core portion doped with the first conductivity type in the second ridge portion, and forming the drain extension region further includes forming a cover portion doped with the second conductivity type, the cover portion being formed so as to be adjacent to at least one or two sidewalls of the second ridge portion.Type: GrantFiled: August 21, 2014Date of Patent: February 23, 2016Assignee: Infineon Technologies AGInventors: Andreas Meiser, Franz Hirler, Christian Kampen
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Publication number: 20150206975Abstract: One embodiment of a semiconductor device includes a fin at a first side of a semiconductor body, a body region of a second conductivity type in at least a part of the fin, a drain extension region of a first conductivity type, a source region and a drain region of the first conductivity type, a source contact in contact with the source region, the source contact extending along a vertical direction along the source region, and a gate structure adjoining opposing walls of the fin.Type: ApplicationFiled: March 9, 2015Publication date: July 23, 2015Inventors: Andreas Meiser, Christian Kampen
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Patent number: 9006811Abstract: One embodiment of a semiconductor device includes a fin on a first side of a semiconductor body. The semiconductor device further includes a body region of a second conductivity type in at least a part of the fin. The semiconductor device further includes a drain extension region of a first conductivity type, a source and a drain region of the first conductivity type, and a gate structure adjoining opposing walls of the fin. The body region and the drain extension region are arranged one after another between the source region and the drain region.Type: GrantFiled: December 3, 2012Date of Patent: April 14, 2015Assignee: Infineon Technologies Austria AGInventors: Andreas Meiser, Christian Kampen
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Publication number: 20140363940Abstract: A transistor is formed by forming a ridge including a first ridge portion and a second ridge portion in a semiconductor substrate, the ridge extending along a first direction, forming a source region, a drain region, a channel region, a drain extension region and a gate electrode adjacent to the channel region, in the ridge, doping the channel region with dopants of a first conductivity type, and doping the source region and the drain region with dopants of a second conductivity type. Forming the drain extension region includes forming a core portion doped with the first conductivity type in the second ridge portion, and forming the drain extension region further includes forming a cover portion doped with the second conductivity type, the cover portion being formed so as to be adjacent to at least one or two sidewalls of the second ridge portion.Type: ApplicationFiled: August 21, 2014Publication date: December 11, 2014Inventors: Andreas Meiser, Franz Hirler, Christian Kampen
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Patent number: 8847311Abstract: A semiconductor device includes a transistor, formed in a semiconductor substrate having a first main surface. The transistor includes a channel region, doped with dopants of a first conductivity type, a source region, a drain region, the source and the drain region being doped with dopants of a second conductivity type different from the first conductivity type, a drain extension region, and a gate electrode adjacent to the channel region. The channel region is disposed in a first portion of a ridge. The drain extension region is disposed in a second portion of the ridge, and includes a core portion doped with the first conductivity type. The drain extension region further includes a cover portion doped with the second conductivity type, the cover portion being adjacent to at least one or two sidewalls of the second portion of the ridge.Type: GrantFiled: December 31, 2012Date of Patent: September 30, 2014Assignee: Infineon Technologies AGInventors: Andreas Meiser, Franz Hirler, Christian Kampen