Abstract: An electronic module includes a semiconductor package, and a clip connected to the semiconductor package. The clip is connected to or includes at least one fastening element which is configured to make a connection to an external heatsink.

Abstract: An electronic module includes a semiconductor package, and a clip connected to the semiconductor package. The clip is connected to or includes at least one fastening element which is configured to make a connection to an external heat sink.

Abstract: A method of manufacturing a package includes mounting an electronic component on an electrically conductive carrier, encapsulating part of the carrier and the electronic component by an encapsulant, covering an exposed surface portion of the carrier with an electrically insulating and thermally conductive interface structure, and covering at least part of the interface structure by a protection cap.

Abstract: A carrier structure is provided. The carrier structure may include an electrically insulating carrier, wherein the carrier is thermally conductive. The carrier includes a core of an electrically insulating material, a first metal layer applied to a first side of the core, and a second metal layer applied to a second side of the core, wherein the second side is opposite the first side. A first exposed solder layer is located on the first metal layer, and a second exposed solder layer is located on the second metal layer.

Abstract: A method of manufacturing a package includes mounting an electronic component on an electrically conductive carrier, encapsulating part of the carrier and the electronic component by an encapsulant, covering an exposed surface portion of the carrier with an electrically insulating and thermally conductive interface structure, and covering at least part of the interface structure by a protection cap.

Abstract: A package includes an electrically conductive carrier, an electronic component on the carrier, an encapsulant encapsulating part of the carrier and the electronic component, an electrically insulating and thermally conductive interface structure covering an exposed surface portion of the carrier, and a protection cap covering at least part of the interface structure. Corresponding methods of manufacturing and operating the package are also described.

Abstract: A method includes forming a plurality of first semiconductor mesa structures at a first semiconductor substrate. The first semiconductor substrate has a first conductivity type. The method further includes forming a plurality of second semiconductor mesa structures at a second semiconductor substrate. The second semiconductor substrate has a second conductivity type. The method further includes providing a glass substrate between the first semiconductor substrate and the second semiconductor substrate. The method includes connecting the first semiconductor substrate to the second semiconductor substrate so that at least a portion of the glass substrate is located laterally between the first semiconductor mesa structures of the plurality of first semiconductor mesa structures and the second semiconductor mesa structures of the plurality of second semiconductor mesa structures.

Abstract: A temperature protected power semiconductor device has a substrate which includes a power field effect transistor (FET) and a thermosensitive element. The power FET has a gate electrode connected to a gate, a drift region, and first and second terminals for a load current. The load current is controllable during operation by a voltage applied between the gate and the first terminal. The thermosensitive element has a first contact connected to one of the gate electrode and first terminal of the power FET, and a second contact connected to the other one of the gate electrode and first terminal. The thermosensitive element is located close to the power FET and thermally coupled thereto. The thermosensitive element is configured to cause the power FET to reduce the load current in case of an exceedance of a limit temperature of the power FET, by interconnecting the gate and first terminal.

Abstract: A package includes an electrically conductive carrier, an electronic component on the carrier, an encapsulant encapsulating part of the carrier and the electronic component, an electrically insulating and thermally conductive interface structure covering an exposed surface portion of the carrier, and a protection cap covering at least part of the interface structure. Corresponding methods of manufacturing and operating the package are also described.

Abstract: A method includes forming a plurality of first semiconductor mesa structures at a first semiconductor substrate. The first semiconductor substrate has a first conductivity type. The method further includes forming a plurality of second semiconductor mesa structures at a second semiconductor substrate. The second semiconductor substrate has a second conductivity type. The method further includes providing a glass substrate between the first semiconductor substrate and the second semiconductor substrate. The method includes connecting the first semiconductor substrate to the second semiconductor substrate so that at least a portion of the glass substrate is located laterally between the first semiconductor mesa structures of the plurality of first semiconductor mesa structures and the second semiconductor mesa structures of the plurality of second semiconductor mesa structures.

Abstract: An electronic component comprising an electrically conductive carrier, an electronic chip on the carrier, an encapsulant encapsulating part of the carrier and the electronic chip, and an electrically insulating and thermally conductive interface structure, in particular covering an exposed surface portion of the carrier and a connected surface portion of the encapsulant, wherein the interface structure has a compressibility in a range between 1% and 20%, in particular in a range between 5% and 15%.

Abstract: An electronic module includes a semiconductor package, and a clip connected to the semiconductor package. The clip is connected to or includes at least one fastening element which is configured to make a connection to an external heat sink.

Abstract: A method of manufacturing a semiconductor power package includes: embedding a power semiconductor chip in an encapsulation, the encapsulation forming a housing of the semiconductor power package; and extending a layer of a covering material over at least a part of an outer main surface of the encapsulation. The covering material has a thermal conductivity greater than a thermal conductivity of the material of the encapsulation and/or a temperature stability greater than a temperature stability of the pre-molded chip housing.

Abstract: A method of manufacturing a semiconductor power package includes: embedding a power semiconductor chip in an encapsulation, the encapsulation forming a housing of the semiconductor power package; and extending a layer of a covering material over at least a part of an outer main surface of the encapsulation. The covering material has a thermal conductivity greater than a thermal conductivity of the material of the encapsulation and/or a temperature stability greater than a temperature stability of the pre-molded chip housing.

Abstract: A thermoelectric device includes a plurality of first semiconductor mesa structures having a first conductivity type and a plurality of second semiconductor mesa structures having a second conductivity type. First semiconductor mesa structures of the plurality of first semiconductor mesa structures and second semiconductor mesa structures of the plurality of second semiconductor mesa structures are electrically connected in series. The thermoelectric device further includes a glass structure made of at least one of a borosilicate glass, boron-zinc-glass and a low transition temperature glass. The glass structure is arranged laterally between the first semiconductor mesa structures of the plurality of first semiconductor mesa structures and the second semiconductor mesa structures of the plurality of second semiconductor mesa structures.

Abstract: A method of manufacturing a semiconductor power package includes: providing a pre-molded chip housing and an electrically conducting chip carrier cast-in-place in the pre-molded chip housing; bonding a power semiconductor chip on the electrically conducting chip carrier; and applying a covering material so as to embed the power semiconductor chip. The covering material has an elastic modulus less than an elastic modulus of a material of the pre-molded chip housing and/or a thermal conductivity greater than a thermal conductivity of the material of the pre-molded chip housing and/or a temperature stability greater than a temperature stability of the pre-molded chip housing.

Abstract: A method of manufacturing a semiconductor power package includes: providing a pre-molded chip housing and an electrically conducting chip carrier cast-in-place in the pre-molded chip housing; bonding a power semiconductor chip on the electrically conducting chip carrier; and applying a covering material so as to embed the power semiconductor chip. The covering material has an elastic modulus less than an elastic modulus of a material of the pre-molded chip housing and/or a thermal conductivity greater than a thermal conductivity of the material of the pre-molded chip housing and/or a temperature stability greater than a temperature stability of the pre-molded chip housing.

Abstract: An electronic component, the electronic component comprising an electrically conductive carrier, an electronic chip on the carrier, an encapsulant encapsulating part of the carrier and the electronic chip, and an electrically insulating and thermally conductive interface structure covering an exposed surface portion of the carrier and a connected surface portion of the encapsulant and being functionalized for promoting heat dissipation via the interface structure on a heat dissipation body.

Abstract: A semiconductor power package includes a pre-molded chip housing and an electrically conducting chip carrier cast-in-place in the pre-molded chip housing. The semiconductor power package further includes a power semiconductor chip bonded on the electrically conducting chip carrier. A covering material is provided to embed the power semiconductor chip. The covering material has an elastic modulus less than an elastic modulus of a material of the pre-molded chip housing and/or a thermal conductivity greater than a thermal conductivity of the material of the pre-molded chip housing and/or a temperature stability greater than a temperature stability of the pre-molded chip housing.

Abstract: An electronic component comprising an electrically conductive carrier, an electronic chip on the carrier, an encapsulant encapsulating part of the carrier and the electronic chip, and an electrically insulating and thermally conductive interface structure, in particular covering an exposed surface portion of the carrier and a connected surface portion of the encapsulant, wherein the interface structure has a compressibility in a range between 1% and 20%, in particular in a range between 5% and 15%.