Abstract: The present invention relates to the field of communications technologies and discloses a data processing method and apparatus to obtain a DPD non-linear distortion compensation coefficient under a QPSK mode. The embodiments of the present invention receive a first data flow, and perform interpolation into the first data flow to obtain a second data flow; receive a third data flow, and calculate a data flow signal quality difference between the third data flow and the second data flow; and obtain a DPD non-linear distortion compensation coefficient according to the data flow signal quality difference and the third data flow or the second data flow. The embodiments of the present invention are applicable to the scenarios of obtaining a DPD non-linear distortion compensation coefficient in QPSK mode.

Abstract: The present invention relates to the field of communications technologies and discloses a data processing method and apparatus to obtain a DPD non-linear distortion compensation coefficient under a QPSK mode. The embodiments of the present invention receive a first data flow, and perform interpolation into the first data flow to obtain a second data flow; receive a third data flow, and calculate a data flow signal quality difference between the third data flow and the second data flow; and obtain a DPD non-linear distortion compensation coefficient according to the data flow signal quality difference and the third data flow or the second data flow. The embodiments of the present invention are applicable to the scenarios of obtaining a DPD non-linear distortion compensation coefficient in QPSK mode.

Abstract: A signal processing apparatus for processing an input signal (x) has an adaptive predistorter, an amplifier and a down-converter. The amplifier is configured to amplify a processed signal (y?) to obtain an amplified signal (y?). The down-converter is configured to multiply a version of the processed signal (y?) with a version of the amplified signal (y?), one of the signal versions being phase shifted, to obtain a first down-converted signal (z1, z1?), and to multiply the processed signal (y?) with the amplified signal (y?) to obtain a second down-converted signal (z2, z2?). The predistorter is configured to predistort the input signal (x) according to a predistortion characteristic to obtain the processed signal (y?), the predistorter being further configured to adapt the predistortion characteristic based on the first down-converted signal (z1, z1?) and the second down-converted signal (z2, z2?).

Abstract: A signal processing apparatus for processing an input signal (x) has an adaptive predistorter, an amplifier and a down-converter. The amplifier is configured to amplify a processed signal (y?) to obtain an amplified signal (y?). The down-converter is configured to multiply a version of the processed signal (y?) with a version of the amplified signal (y?), one of the signal versions being phase shifted, to obtain a first down-converted signal (z1, z1?), and to multiply the processed signal (y?) with the amplified signal (y?) to obtain a second down-converted signal (z2, z2?). The predistorter is configured to predistort the input signal (x) according to a predistortion characteristic to obtain the processed signal (y?), the predistorter being further configured to adapt the predistortion characteristic based on the first down-converted signal (z1, z1?) and the second down-converted signal (z2, z2?).

Abstract: A phase error compensation arrangement comprising a first phase error compensator and a second phase error compensator arranged downstream of the first phase error compensator. The first phase error compensator is configured to obtain a first estimated phase error ((?PS) of the receive signal based on a value of the receive signal and a predefined pilot value, to shift a phase of the receive signal by the first estimated phase error (?PS), and to provide the phase shifted receive signal to the second phase error compensator.