Abstract: A method for controlling gain of an amplifier includes amplifying one or more received signals to produce one or more amplified signals. The method also includes generating a plurality of down converted signals using the one or more amplified signals. The method further includes amplifying the plurality of down converted signals based on a gain control signal. In addition, the method includes varying a time constant of the gain control signal based on a time derivative parameter associated with the plurality of down converted signals.

Abstract: An adjustable phase shifter generates a phase shifted reference signal by introducing a phase shift in a reference signal. A phase detector identifies a phase difference between the reference signal and the phase shifted reference signal. A control signal generator generates a plurality of control signals, each of which causes the adjustable phase shifter to adjust a magnitude of at least one component value in the adjustable phase shifter. The phase shift introduced by the adjustable phase shifter is based at least partially on the magnitude of the at least one component value in the adjustable phase shifter. The control signal generator also selects one of the control signals, where the selected control signal causes the adjustable phase shifter to produce the phase shifted reference signal such that the phase difference attains a specified value. The analog filter adjusts a magnitude of at least one component value in the analog filter based at least partially on the selected control signal.

Abstract: The present invention relates to a semiconductor device arranged at a surface of a semiconductor substrate having an initial doping having an electrical connection comprising at least one plug made of a material with a high conductivity, especially a material other than the substrate, especially a metal plug, between said initially doped substrate and said surface of the substrate. The device has at least one ground connection arranged to be connected to a ground pin on a package. The ground connection is arranged to be connected to said ground pin using said electrical connection, where the initially doped substrate is arranged to be connected to said ground pin via a reverse side of the substrate, opposite said surface, and thereby being arranged to establish a connection between said ground connection and said ground pin.

Abstract: The invention relates to trimming of analogue filters (201) in integrated circuits by means of an automatic adjusting circuit. A local oscillator (202) in the automatic adjusting circuit provides a periodic reference signal (R) to an adjustable phase shifter (203), which on basis thereof, produces a periodic phase shifted signal (R*). A phase detector (204) receives both the periodic reference signal (R) and the phase shifted period signal (R*) and produces a test signal (T) in response to a phase difference between the periodic reference signal (R) and the periodic phase shifted signal (R8). A lowpass filter (205) receives the test signal (T) and generates a level signal (TDC) relative a reference level, e.g. representing a zero voltage. A digital signal processor (207) produces a primary control signal (CS), having a serial format, on basis of the observation signal (M). A serial-to-parallel converter (208) converts the primary control signal (CS) into a control signal (CP) having a parallel signal format.

Abstract: The invention relates to gain control for an amplifier for received radio signals by means of an automatic gain control signal (c). A down converter (103) produces signal components (I; Q) that are amplified in a respective amplifier (104, 105). Then, the resulting signal components (IP-LP; QP-LP) are digitised in A/D-converters (110; 111) for further processing in a digital signal processor (112) and are also fed to a respective signal level detector (113; 114) whose output signals ([I]; [Q]) are combined (115) into a combined signal (V&Sgr;). This signal (V&Sgr;) is forwarded to a gain control unit (116), which produces the automatic gain control signal (c). The automatic gain control signal (c) controls the gain of the amplifiers (104; 105) such that the resulting signal components (IP-LP; QP-LP) are maintained at signal level ([I]; [Q]) less than a predetermined limit level being adapted to the A/D-converters (110; 111).

Abstract: The invention relates to trimming of analogue filters (201) in integrated circuits by means of an automatic adjusting circuit. A local oscillator (202) in the automatic adjusting circuit provides a periodic reference signal (R) to an adjustable phase shifter (203), which on basis thereof, produces a periodic phase shifted signal (R*). A phase detector (204) receives both the periodic reference signal (R) and the phase shifted period signal (R*) and produces a test signal (T) in response to a phase difference between the periodic reference signal (R) and the periodic phase shifted signal (R8). A lowpass filter (205) receives the test signal (T) and generates a level signal (TDC) relative a reference level, e.g. representing a zero voltage. A digital signal processor (207) produces a primary control signal (CS), having a serial format, on basis of the observation signal (M). A serial-to-parallel converter (208) converts the primary control signal (CS) into a control signal (CP) having a parallel signal format.

Abstract: A mixer includes a first terminal and a second terminal forming a first input port for receiving a first signal having a first frequency; a second input port for receiving a second signal having a second frequency; a mixer output port for a resulting signal; a first group of valves having their control inputs coupled to the first terminal for receiving the first signal; a second group of valves having their control inputs coupled to the second terminal for receiving the first signal; and a third group of two valves having their control inputs coupled for receiving the second signal. The valves co-operate such that in operation the mixer produces the resulting signal responsive to the first and second signals. The mixer also includes at least one passive low pass filter having an inductor, the low pass filter being connected to the control input of a valve in the first and second groups.

Abstract: The invention relates to gain control for an amplifier for received radio signals by means of an automatic gain control signal (c). A down converter (103) produces signal components (I; Q) from received radio frequency signals (RF). The signal components (I; Q) are amplified in a respective amplifier (104; 105), low pass filtered (106; 107) and further amplified (108; 109). Then, the resulting signal components (IP-LP; Q−LP) are digitised in A/D-converters (110; 111 ) for further processing in a digital signal processor (112). The resulting signal components (IP-LP; QP-LP) are also fed to a respective signal level detector (113; 114) whose output signals ([I]; [Q]) are combined (115) into a combined signal (V&Sgr;). This signal (V&Sgr;) is forwarded to a gain control unti (116), which produces the automatic gain control signal (c).

Abstract: The invention relates to trimming of analogue filters (201) in integrated circuits by means of an automatic adjusting circuit. A local oscillator (202) in the automatic adjusting circuit provides a periodic reference signal (R) to an adjustable phase shifter (203), which on basis thereof, produces a periodic phase shifted signal (R*). A phase detector (204) receives both the periodic reference signal (R) and the phase shifted period signal (R*) and produces a test signal (T) in response to a phase difference between the periodic reference signal (R) and the periodic phase shifted signal (R8). A lowpass filter (205) receives the test signal (T) and generates a level signal (TDC) relative a reference level, e.g. representing a zero voltage. A digital signal processor (207) produces a primary control signal (CS), having a serial format, on basis of the observation signal (M). A serial-to-parallel converter (208) converts the primary control signal (CS) into a control signal (CP) having a parallel signal format.

Abstract: A mixer includes a first terminal and a second terminal forming a first input port for receiving a first signal having a first frequency; a second input port for receiving a second signal having a second frequency; a mixer output port for a resulting signal; a first group of valves having their control inputs coupled to the first terminal for receiving the first signal; a second group of valves having their control inputs coupled to the second terminal for receiving the first signal; and a third group of two valves having their control inputs coupled for receiving the second signal. The valves co-operate such that in operation the mixer produces the resulting signal responsive to the first and second signals. The mixer also includes at least one passive low pass filter having an inductor, the low pass filter being connected to the control input of a valve in the first and second groups.

Abstract: The present invention relates to a method for semiconductor manufacturing of one semiconductor circuit, having a multiple of transistors NMOS1, NMOS2, NPN1, NPN2 of one type. The method comprises the steps of arranging a first region 4, 16 on a semiconductor substrate 1, and implementing two transistors of said type, having different sets of characteristics, in said first region 4, 16. The step of implementing said active devices comprises a step of creating a first 6′, 10′ and a second 6″, 10″ subregion within said first region 4, 16, and said step further comprising a step of introducing dopants having different sets of dose parameters, into a first and a second area, respectively, of said first region, said dopants being of a similar type, and a step of annealing said substrate 1 to create said first 6′, 10′ and second 6″, 10″ subregion, respectively, whereby two subregions, having different doping profiles, can be manufactured on a single integrated circuit.

Abstract: In a telecommunications network that employs a CDMA scheme, the amplitude associated with each independent CDMA carrier is digitally limited, thereby limiting the peak-to-average power ratio. This, in turn, is accomplished by measuring the instantaneous amplitude for the in-phase and quadrature signals that make up each CDMA carrier, deriving a maximum amplitude based on the instantaneous amplitude measurements, and then deriving one or more scaling factors based, in-part, on maximum amplitude. The one or more scaling factors are then applied to the in-phase and quadrature signals, which are subsequently filtered, combined and modulated by a corresponding CDMA carrier frequency.

Abstract: The present invention relates to a method for semiconductor manufacturing of one semiconductor circuit, having a multiple of transistors NMOS1, NMOS2, NPN1, NPN2 of one type. The method comprises the steps of arranging a first region 4, 16 on a semiconductor substrate 1, and implementing two transistors of said type, having different sets of characteristics, in said first region 4, 16. The step of implementing said active devices comprises a step of creating a first 6′, 10′ and a second 6″, 10″ subregion within said first region 4, 16, and said step further comprising a step of introducing dopants having different sets of dose parameters, into a first and a second area, respectively, of said first region, said dopants being of a similar type, and a step of annealing said substrate 1 to create said first 6′, 10′ and second 6″, 10″ subregion, respectively, whereby two subregions, having different doping profiles, can be manufactured on a single integrated circuit.

Abstract: A method and system for reducing spurious signal content in transmitters is described. A lowpass or bandpass filter can be inserted after an input signal node of a transmitter to remove interfering signals generated, for example, from another input signal node of the transmitter. In this way integration of the transmitter circuitry is enhanced.

Abstract: An apparatus for compensating the phase rotation in the feedback loop of a cartesian feedback power amplifier in a final transmitter stage for quadrature modulation of the complex difference signal between a complex input signal and the corresponding complex feedback signal with a complex modulation signal for forming a modulated real valued first signal and for quadrature modulation of the output signal from the power amplifier with a complex demodulation signal for forming the complex feedback signal. The phase shift between the first signal and the second signal and between the quadrature component of the first signal and the second signal is detected for determining the phase rotation of the feedback loop. Furthermore, the phase rotation of the complex modulation signal can be changed with a compensating phase rotation defined by the determined phase rotation.

Abstract: A compact local oscillator network for use in a quadrature modulator and/or demodulator is presented. Single side band circuitry is configured to produce quadrature signals with a high degree of accuracy such that two equal amplitude signals are generated having a precise 90.degree. phase difference. The network accuracy is substantially not affected by phase or amplitude imbalances within or introduced into the network. For example, the network may include: a first quadrature circuit for dividing a first input signal into a first in-phase signal and a first quadrature signal 90.degree. out of phase; a second quadrature circuit for dividing a second input signal into a second in-phase signal and a second quadrature signal 90.degree.