Abstract: One embodiment of the present application includes a multisensor assembly. This assembly has an electromechanical motion sensor member defined with one wafer layer, a first sensor carried with a first one or two or more other wafer layers, and a second sensor carried with a second one of the other wafer layers. The one wafer layer is positioned between the other wafer layers to correspondingly enclose the sensor member within a cavity of the assembly.

Abstract: A high bandwidth circuit is segmented into a plurality of portions, each portion for implementation on a corresponding semiconductor chip, an arrangement of one or more die bond pads for each corresponding chip is generated, and a chip location for each corresponding chip is generated, given package and given package I/O arrangement is generated, the generation of the die bond arrangements and the chip position being relative to given chip package parameters, and being generated to establish bond wire lengths meeting given characteristic impedance parameters. Boundary parameters for generating the segmenting are provided, including a bound on the number of portions and optionally a including bound on the area parameters of the corresponding semiconductor chips.

Abstract: A high bandwidth circuit is segmented into a plurality of portions, each portion for implementation on a corresponding semiconductor chip, an arrangement of one or more die bond pads for each corresponding chip is generated, and a chip location for each corresponding chip is generated, given package and given package I/O arrangement is generated, the generation of the die bond arrangements and the chip position being relative to given chip package parameters, and being generated to establish bond wire lengths meeting given characteristic impedance parameters. Boundary parameters for generating the segmenting are provided, including a bound on the number of portions and optionally a including bound on the area parameters of the corresponding semiconductor chips.

Abstract: A high bandwidth circuit is segmented into a plurality of portions, each portion for implementation on a corresponding semiconductor chip, an arrangement of one or more die bond pads for each corresponding chip is generated, and a chip location for each corresponding chip is generated, given package and given package I/O arrangement is generated, the generation of the die bond arrangements and the chip position being relative to given chip package parameters, and being generated to establish bond wire lengths meeting given characteristic impedance parameters. Boundary parameters for generating the segmenting are provided, including a bound on the number of portions and optionally a including bound on the area parameters of the corresponding semiconductor chips.

Abstract: One embodiment of the present application includes a multisensor assembly. This assembly has an electromechanical motion sensor member defined with one wafer layer, a first sensor carried with a first one or two or more other wafer layers, and a second sensor carried with a second one of the other wafer layers. The one wafer layer is positioned between the other wafer layers to correspondingly enclose the sensor member within a cavity of the assembly.

Abstract: A circuit for a MOS-type integrated device includes two cross-coupled drain-gate transistors. In order to supply filtered voltages V'DD and V'SS which are equivalent to VDD and VSS, an N-channel first transistor has its source connected to VSS and its drain supplies the voltage V'SS, while a P-channel second transistor has its source connected to VDD, and its drain supplies the voltage V'DD. A third transistor may also be provided in order to accelerate the initial switching of the circuit should its state not be appropriate when voltage is applied.