Abstract: The invention relates to a new process leading to new substituted 1H-benzo[d]imidazol-2(3H)-ones of formula III and III?, to pharmaceutical compositions comprising them and to their use as therapeutic agents, particularly as BACE 1 inhibitors in the treatment of Alzheimer disease.

Abstract: A digital system is provided with a secure mode (3rd level of privilege) built in a non-invasive way on a processor system that includes a processor core, instruction and data caches, a write buffer and a memory management unit. A secure execution mode is thus provided on a platform where the only trusted software is the code stored in ROM. In particular the OS is not trusted, all native applications are not trusted. A secure execution mode is provided that allows virtual addressing when a memory management unit (MMU) is enabled. The secure execution mode allows instruction and data cache to be enabled. A secure execution mode is provided that allows all the system interruptions to be unmasked. The secure mode is entered through a unique entry point. The secure execution mode can be dynamically entered and exited with full hardware assessment of the entry/exit conditions. A specific set of entry conditions is monitored that account for caches, write buffer and MMU being enabled.

Abstract: The invention relates to a new process leading to new substituted 1H-benzo[d]imidazol-2(3H)-ones of formula III and III?, to pharmaceutical compositions comprising them and to their use as therapeutic agents, particularly as BACE 1 inhibitors in the treatment of Alzheimer disease.

Abstract: A digital system is provided with a secure mode (3rd level of privilege) built in a non-invasive way on a processor system that includes a processor core, instruction and data caches, a write buffer and a memory management unit. A secure execution mode is thus provided on a platform where the only trusted software is the code stored in ROM. In particular the OS is not trusted, all native applications are not trusted. A secure execution mode is provided that allows virtual addressing when a memory management unit (MMU) is enabled. The secure execution mode allows instruction and data cache to be enabled. A secure execution mode is provided that allows all the system interruptions to be unmasked. The secure mode is entered through a unique entry point. The secure execution mode can be dynamically entered and exited with full hardware assessment of the entry/exit conditions. A specific set of entry conditions is monitored that account for caches, write buffer and MMU being enabled.

Abstract: Process for the preparation of primary amines of formula (I): where R3 represents an alkyl, cycloalkyl or aralkyl group, by reaction of a triazolium salt of formula (II): where R1 and R2 represent hydrogen or an alkyl, aralkyl or aryl group, R4 represents an alkyl or aralkyl group or a residue of an organic polymer functionalized by an alkylating group, and A? represents a halogen, alkylsulphonate, arylsulphonate, alkyl sulphate, hydrogensulphate, hemisulphate, perchlorate or hydroxide, with a hydride, in order to obtain an amine of formula (I), which is isolated, if desired, and intermediates.

Abstract: A digital system is provided with a secure mode (3rd level of privilege) built in a non-invasive way on a processor system that includes a processor core, instruction and data caches, a write buffer and a memory management unit. A secure execution mode is thus provided on a platform where the only trusted software is the code stored in ROM. In particular the OS is not trusted, all native applications are not trusted. A secure execution mode is provided that allows virtual addressing when a memory management unit (MMU) is enabled. The secure execution mode allows instruction and data cache to be enabled. A secure execution mode is provided that allows all the system interruptions to be unmasked. The secure mode is entered through a unique entry point. The secure execution mode can be dynamically entered and exited with full hardware assessment of the entry/exit conditions. A specific set of entry conditions is monitored that account for caches, write buffer and MMU being enabled.

Abstract: The present invention relates to chiral esters of polysaccharides, preferably of cellulose, amylose, ?-cyclodextrin or amylopectin, obtained by reacting, in basic medium, polysaccharides (polyhydroxylated compounds) with racemic or enriched acid chlorides bearing a hydrogen and an aromatic group on their a carbon. This acid precursor (I) may be ?-phenylpropionic acid, ibuprofen, ketoprofen or naproxen and, more generally, any acid derivative which may lead to a reactive form of ketene type. These novel asymmetric esters of polyhydroxylated compounds may be used as means of chiral enrichment, as medicinal systems with sustained and controlled release of enriched chiral active principles, these active principles consisting of the acyl parts of the esters grafted onto the hydroxyls (or even onto the amines) of the polyhydroxylated compounds, or alternatively as chiral stationary phases (CSPs).

Abstract: Process for the preparation of primary amines of formula (I): where R3 represents an alkyl, cycloalkyl or aralkyl group, by reaction of a triazolium salt of formula (II): where R1 and R2 represent hydrogen or an alkyl, aralkyl or aryl group, R4 represents an alkyl or aralkyl group or a residue of an organic polymer functionalized by an alkylating group, and A? represents a halogen, alkylsulphonate, arylsulphonate, alkyl sulphate, hydrogensulphate, hemisulphate, perchlorate or hydroxide, with a hydride, in order to obtain an amine of formula (I), which is isolated, if desired, and intermediates.

Abstract: A digital system is provided with a secure mode (3rd level of privilege) built in a non-invasive way on a processor system that includes a processor core, instruction and data caches, a write buffer and a memory management unit. A secure execution mode is thus provided on a platform where the only trusted software is the code stored in ROM. In particular the OS is not trusted, all native applications are not trusted. A secure execution mode is provided that allows virtual addressing when a memory management unit (MMU) is enabled. The secure execution mode allows instruction and data cache to be enabled. A secure execution mode is provided that allows all the system interruptions to be unmasked. The secure mode is entered through a unique entry point. The secure execution mode can be dynamically entered and exited with full hardware assessment of the entry/exit conditions. A specific set of entry conditions is monitored that account for caches, write buffer and MMU being enabled.

Abstract: A digital system is provided with a secure mode (3rd level of privilege) built in a non-invasive way on a processor system that includes a processor core, instruction and data caches, a write buffer and a memory management unit. A secure execution mode is thus provided on a platform where the only trusted software is the code stored in ROM. In particular the OS is not trusted, all native applications are not trusted. A secure execution mode is provided that allows virtual addressing when a memory management unit (MMU) is enabled. The secure execution mode allows instruction and data cache to be enabled. A secure execution mode is provided that allows all the system interruptions to be unmasked. The secure mode is entered through a unique entry point. The secure execution mode can be dynamically entered and exited with full hardware assessment of the entry/exit conditions. A specific set of entry conditions is monitored that account for caches, write buffer and MMU being enabled.

Abstract: A digital system is provided with a secure mode (3rd level of privilege) built in a non-invasive way on a processor system that includes a processor core, instruction and data caches, a write buffer and a memory management unit. A secure execution mode is thus provided on a platform where the only trusted software is the code stored in ROM. In particular the OS is not trusted, all native applications are not trusted. A secure execution mode is provided that allows virtual addressing when a memory management unit (MMU) is enabled. The secure execution mode allows instruction and data cache to be enabled. A secure execution mode is provided that allows all the system interruptions to be unmasked. The secure mode is entered through a unique entry point. The secure execution mode can be dynamically entered and exited with full hardware assessment of the entry/exit conditions. A specific set of entry conditions is monitored that account for caches, write buffer and MMU being enabled.

Abstract: A process for preparing polyalkylpyrylium salts comprising a polyalkylpyrylium cation, wherein the pyrylium nucleus is substituted by 3 to 5 alkyl substituents three of which are situated in the 2-, 4- and 6-position is disclosed which comprises the step of reacting a branched alkane comprising at least one tertiary carbon atom with an acylating agent which is a reactive alkylcarboxylic acid derivative and an alkyl halide in the presence of a Lewis acid catalyst selected from the group consisting of aluminum halides, ferric halides and mixtures thereof.