Patents by Inventor Christian Ruster

Christian Ruster has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7929336
    Abstract: An integrated circuit includes a resistance changing memory element and a circuit. The circuit is configured to program the memory element to a crystalline state from an amorphous state by applying a seed pulse to the memory element followed by a set pulse.
    Type: Grant
    Filed: June 11, 2008
    Date of Patent: April 19, 2011
    Assignee: Qimonda AG
    Inventors: Jan Boris Philipp, Thomas Happ, Bernhard Ruf, Christian Rüster
  • Patent number: 7646632
    Abstract: An integrated circuit includes an array of resistance changing memory cells and a first circuit. The first circuit is configured to set a selected memory cell to a crystalline state by applying a decreasing stair step pulse to the selected memory cell. The pulse is based on a reset current distribution for the array of memory cells.
    Type: Grant
    Filed: December 21, 2007
    Date of Patent: January 12, 2010
    Assignee: Qimonda AG
    Inventors: Jan Boris Philipp, Thomas Happ, Bernhard Ruf, Christian Rüster, Dieter Andres, Petra Majewski
  • Publication number: 20090310401
    Abstract: An integrated circuit includes a resistance changing memory element and a circuit. The circuit is configured to program the memory element to a crystalline state from an amorphous state by applying a seed pulse to the memory element followed by a set pulse.
    Type: Application
    Filed: June 11, 2008
    Publication date: December 17, 2009
    Applicant: Qimonda AG
    Inventors: Jan Boris Philipp, Thomas Happ, Bernhard Ruf, Christian Ruster
  • Publication number: 20090161415
    Abstract: An integrated circuit includes an array of resistance changing memory cells and a first circuit. The first circuit is configured to set a selected memory cell to a crystalline state by applying a decreasing stair step pulse to the selected memory cell. The pulse is based on a reset current distribution for the array of memory cells.
    Type: Application
    Filed: December 21, 2007
    Publication date: June 25, 2009
    Applicant: Qimonda AG
    Inventors: Jan Boris Philipp, Thomas Happ, Bernhard Ruf, Christian Ruster, Dieter Andres, Petra Majewski
  • Publication number: 20090009914
    Abstract: A spin-valve structure is provided, illustrating the layer structure used for the magnetic tunnel junction, by a method comprising the steps of providing a substrate, growing a ferromagnetic layer on the substrate, growing a tunnel barrier layer on the ferromagnetic layer, providing a first non-magnetic metallic contact on the ferromagnetic layer and providing a second non-magnetic metallic contact for the single ferromagnetic layer. Beside such a single sided structure a double-sided structure can be provided having e.g. a Ga0.94Mn0.06As/undoped GaAs/Ga0.94Mn0.06As trilayer structure on top of a semi-insulating GaAs substrate and an undoped LT-GaAs buffer layer. There is an inner square contact and a surrounding electrical back contact. This sample structure makes it possible to perform two-probe magnetoresistance measurements through both ferromagnets and the GaAs tunnel barrier. The resistance of the device is fully dominated by the vertical tunneling process through the tunnel barrier.
    Type: Application
    Filed: May 3, 2005
    Publication date: January 8, 2009
    Applicant: ETECH AG
    Inventors: Georg Schmidt, Charles Gould, Laurens W. Molenkamp, Christian Ruster