Abstract: A method and a device for correcting errors in a processor having two execution units as well as a corresponding processor, in which registers are provided in which instructions and/or associated information can be stored, the instructions being processed redundantly in both execution units and comparison means being included, and being such that by comparing the instructions and/or the associated information a deviation and thus an error is detected, a division of the registers of the processor into first registers and second registers being provided, the first registers being such that a specifiable state of the processor and contents of the second registers are derivable from them, means for a rollback being included, which are such that at least one instruction and/or the information in the first registers are rolled back and are executed anew and/or restored.