Abstract: A power semiconductor module includes a power semiconductor chip arranged between a first substrate and a second substrate and electrically coupled to the substrates, and a temperature sensor arranged between the substrates and laterally besides the power semiconductor chip such that a first side of the temperature sensor faces the first substrate and a second side of the temperature sensor faces the second substrate. A first electrical contact of the temperature sensor is arranged on the first side and electrically coupled to the first substrate. A second electrical contact of the temperature sensor is arranged on the second side and electrically coupled to the second substrate.

Abstract: A fluid channel for a power semiconductor module includes a die carrier configured to carry a plurality of semiconductor dies on a first side, a plurality of cooling elements arranged on a second side of the die carrier opposite the first side, and a channel wall arranged opposite the second side of the die carrier and forming a cavity. The cooling elements are arranged in the cavity. The cooling elements are attached to the die carrier at attachment points. A majority of the attachment points are positioned vertically in alignment with positions of the semiconductor dies.

Abstract: A fluid channel for a power semiconductor module includes a die carrier configured to carry a plurality of semiconductor dies on a first side, a plurality of cooling elements arranged on a second side of the die carrier opposite the first side, and a channel wall arranged opposite the second side of the die carrier and forming a cavity. The cooling elements are arranged in the cavity. The cooling elements are attached to the die carrier at attachment points. A majority of the attachment points are positioned vertically in alignment with positions of the semiconductor dies.

Abstract: A double-sided coolable semiconductor package includes an upper electrically conductive element having an outwardly exposed metal surface, a lower carrier substrate having an upper electrically conductive layer, a lower electrically conductive layer having an outwardly exposed surface, and an electrical insulation layer arranged between the electrically conductive layers, a first electrically conductive spacer arranged between the upper electrically conductive element and the upper electrically conductive layer, a power semiconductor chip arranged between the upper electrically conductive element and the upper electrically conductive layer, a second electrically conductive spacer arranged between the upper electrically conductive element and the chip, and power terminals arranged along a first side of the package. A second power terminal is arranged between first and third power terminals. The first and third power terminals are configured to apply a first supply voltage.

Abstract: A power semiconductor module includes a power semiconductor chip arranged between a first substrate and a second substrate and electrically coupled to the substrates, and a temperature sensor arranged between the substrates and laterally besides the power semiconductor chip such that a first side of the temperature sensor faces the first substrate and a second side of the temperature sensor faces the second substrate. A first electrical contact of the temperature sensor is arranged on the first side and electrically coupled to the first substrate. A second electrical contact of the temperature sensor is arranged on the second side and electrically coupled to the second substrate.

Abstract: A power semiconductor arrangement includes first and second power semiconductor modules. Each power semiconductor module has a first main side and an opposing second main side. The power semiconductor modules are arranged such that a main side of the first power semiconductor module and a main side of the second power semiconductor module are facing each other. The power semiconductor arrangement further includes a cooler housing configured for direct liquid cooling of the power semiconductor modules. The cooler housing includes a fluid channel. At least one main side of the first power semiconductor module forms a sidewall of the fluid channel. A flow direction in the fluid channel along the first main side and a flow direction along the second main side of the first power semiconductor module are oriented in opposite directions.

Abstract: A semiconductor module includes a semiconductor die, a mold compound encasing the semiconductor die, a plurality of terminals electrically connected to the semiconductor die and protruding out of the mold compound, wherein a first one of the terminals has a constricted region covered by the mold compound, wherein the mold compound has a recess or an opening near the constricted region of the first terminal, and a coreless magnetic field sensor disposed in the recess or the opening of the mold compound and isolated from the first terminal by the mold compound. The coreless magnetic sensor is configured to generate a signal in response to a magnetic field produced by current flowing in the constricted region of the first terminal. The magnitude of the signal is proportional to the amount of current flowing in the constricted region of the first terminal. A method of manufacturing the module also is described.

Abstract: A double-sided coolable semiconductor package includes an upper electrically conductive element having an outwardly exposed metal surface, a lower carrier substrate having an upper electrically conductive layer, a lower electrically conductive layer having an outwardly exposed surface, and an electrical insulation layer arranged between the electrically conductive layers, a first electrically conductive spacer arranged between the upper electrically conductive element and the upper electrically conductive layer, a power semiconductor chip arranged between the upper electrically conductive element and the upper electrically conductive layer, a second electrically conductive spacer arranged between the upper electrically conductive element and the chip, and power terminals arranged along a first side of the package. A second power terminal is arranged between first and third power terminals. The first and third power terminals are configured to apply a first supply voltage.

Abstract: Embodiments of the present disclosure relate to methods, system, and devices for synchronizing angular position information between a first and a second semiconductor chip used for engine management in an automobile is described. In accordance with one embodiment, a system for synchronizing angular position information between a first and a second semiconductor chip comprises the first and the second semiconductor chip and a digital real-time communication link connecting the first and the second semiconductor chip. The second semiconductor chip comprise a master angle estimation circuit, which is configured to estimate an angular position of the engine based on at least one angular position sensor signal. The first semiconductor chip comprises a slave angle estimation circuit, which is configured to estimate an angular position of the engine based on information concerning angular position received form the master angle estimation circuit via the communication link.

Abstract: In one example, a circuit includes a voltage source, an inductive load, a capacitor, a switching unit, and a load unit. The switching unit is configured to operate in a first state and a second state. The switching unit couples the inductive load to the voltage source during the first state. The switching unit couples the inductive load to the capacitor during the second state. The load unit is configured to receive energy from the capacitor based on a comparison of a voltage of the capacitor and a reference voltage.

Abstract: According to an embodiment, a controller system that is configured to drive a power switch includes a driver integrated circuit (IC), which includes an interface circuit, a synchronization circuit, and a drive circuit. The interface circuit is configured to receive a control scheme over a serial interface. The synchronization circuit is coupled to the interface circuit and is configured to receive an angular position signal and synchronize a drive signal with the angular position signal, where the drive signal is based on the control scheme. The drive circuit is coupled to the synchronization circuit and is configured to drive the power switch using the drive signal.

Abstract: Techniques for driving a plurality of inductive actuators are described herein. According to these techniques, a driver unit includes a clock terminal that receives an external clock signal used by an external control unit. The driver unit further includes a serial bus interface configured to communicate with the external control unit via a serial bus. The serial bus is configured to communicate both of trigger commands synchronized to the external clock signal that indicate to at least one of a plurality of programmable control circuits (PCUs) to generate drive signals in response to the trigger commands that are synchronized with the external clock signal and data associated with at least one of the plurality of PCUs and synchronized with the external clock signal, wherein the data is used by the at least one of the plurality of PCUs to generate the drive signals in response to the trigger commands.

Abstract: In one example, a circuit includes a voltage source, an inductive load, a capacitor, a switching unit, and a load unit. The switching unit is configured to operate in a first state and a second state. The switching unit couples the inductive load to the voltage source during the first state. The switching unit couples the inductive load to the capacitor during the second state. The load unit is configured to receive energy from the capacitor based on a comparison of a voltage of the capacitor and a reference voltage.

Abstract: Embodiments of the present disclosure relate to a control infrastructure and relates systems and devices for controlling automotive components associated with a first domain of automotive components. In accordance with one exemplary embodiment the system comprises a Performance Cluster chip, at least a first Peripheral Integrated Circuit (IC) chip, and a digital real-time communication link connecting the Performance Cluster chip and the first Peripheral IC chip. The Performance Cluster chip is configured to execute application specific software, which includes at least one control algorithm for controlling at least one automotive component of the first domain. The Performance Cluster chip includes a first clock generator circuit generating a master clock signal, and Peripheral IC chip includes a second clock generator circuit, which synchronizes to the master clock signal via the communication link to generate a slave clock signal for the Peripheral IC chip.

Abstract: Embodiments of the present disclosure relate to methods, system, and devices for synchronizing angular position information between a first and a second semiconductor chip used for engine management in an automobile is described. In accordance with one embodiment, a system for synchronizing angular position information between a first and a second semiconductor chip comprises the first and the second semiconductor chip and a digital real-time communication link connecting the first and the second semiconductor chip. The second semiconductor chip comprise a master angle estimation circuit, which is configured to estimate an angular position of the engine based on at least one angular position sensor signal. The first semiconductor chip comprise a slave angle estimation circuit, which is configured to estimate an angular position of the engine based on information concerning angular position received form the master angle estimation circuit via the communication link.

Abstract: According to an embodiment, a controller system that is configured to drive a power switch includes a driver integrated circuit (IC), which includes an interface circuit, a synchronization circuit, and a drive circuit. The interface circuit is configured to receive a control scheme over a serial interface. The synchronization circuit is coupled to the interface circuit and is configured to receive an angular position signal and synchronize a drive signal with the angular position signal, where the drive signal is based on the control scheme. The drive circuit is coupled to the synchronization circuit and is configured to drive the power switch using the drive signal.

Abstract: A current driving system for a solenoid valve is described herein. In an embodiment, the current driving system comprises a pre-driver to control a control input of a transistor coupled to an electrical input of a solenoid valve. The transistor inducts electric power into the solenoid valve when the transistor is switched on. The current driving system further comprises a signal generator to produce a small signal and to output the small signal to the electrical input of the solenoid valve. The electric power being supplied by the small signal into the solenoid valve is substantially smaller than the electric power being supplied by the transistor when the transistor is switched on. The current driving system further comprises a measurement unit to measure a response to the small signal at the electrical input of the solenoid valve.

Abstract: A device may include a driver integrated circuit (IC) comprising a first control unit and a second control unit, a first solenoid that is electrically coupled to the first control unit, a second solenoid that is electrically coupled to the second control unit; at least one sensor, a clock that synchronizes a microcontroller and the driver IC, and a peripheral bus that communicatively couples the first control unit, the second control unit. The microcontroller and the driver IC form an outer control loop that actuates the first solenoid and the second solenoid, and the first control unit, the second control unit, and the at least one sensor form an inner control loop that controls the first solenoid and the second solenoid.

Abstract: A device may include a driver integrated circuit (IC) comprising a first control unit and a second control unit, a first solenoid that is electrically coupled to the first control unit, a second solenoid that is electrically coupled to the second control unit; at least one sensor, a clock that synchronizes a microcontroller and the driver IC, and a peripheral bus that communicatively couples the first control unit, the second control unit. The microcontroller and the driver IC form an outer control loop that actuates the first solenoid and the second solenoid, and the first control unit, the second control unit, and the at least one sensor form an inner control loop that controls the first solenoid and the second solenoid.

Abstract: Techniques for driving a plurality of inductive actuators are described herein. According to these techniques, a driver unit includes a clock terminal that receives an external clock signal used by an external control unit. The driver unit further includes a serial bus interface configured to communicate with the external control unit via a serial bus. The serial bus is configured to communicate both of trigger commands synchronized to the external clock signal that indicate to at least one of a plurality of programmable control circuits (PCUs) to generate drive signals in response to the trigger commands that are synchronized with the external clock signal and data associated with at least one of the plurality of PCUs and synchronized with the external clock signal, wherein the data is used by the at least one of the plurality of PCUs to generate the drive signals in response to the trigger commands.