Patents by Inventor Christian Valpard

Christian Valpard has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11029996
    Abstract: A computer system comprising a plurality of processor units, resources for executing a harmonic set of tasks, and a task interrupt switch device having inputs for receiving a common time base and the task interrupts, outputs each connected to a respective one of the processor units, registers each corresponding a to respective one of the outputs, reinitializable counters each corresponding to a respective one of the outputs, and a control unit arranged to distribute the task interrupts between the outputs as a function of the values of the registers and of the counters.
    Type: Grant
    Filed: August 1, 2017
    Date of Patent: June 8, 2021
    Assignee: Safran Electronics & Defense
    Inventors: Céline Liu, Christian Valpard
  • Publication number: 20190205161
    Abstract: A computer system comprising a plurality of processor units, resources for executing a harmonic set of tasks, and a task interrupt switch device having inputs for receiving a common time base and the task interrupts, outputs each connected to a respective one of the processor units, registers each corresponding a to respective one of the outputs, reinitializable counters each corresponding to a respective one of the outputs, and a control unit arranged to distribute the task interrupts between the outputs as a function of the values of the registers and of the counters.
    Type: Application
    Filed: August 1, 2017
    Publication date: July 4, 2019
    Inventors: Céline LIU, Christian VALPARD
  • Patent number: 9734065
    Abstract: The present invention relates to a method of transmitting a message comprising an integrity check and a header, between two processing units via a shared memory, comprising steps of: —generation (501), by a first processing unit, of a first pseudorandom binary string; —encryption (502) of the message to be transmitted by applying an involutive transformation dependent on the first pseudorandom binary string generated; —transmission and storage (503) of the encrypted message in the shared memory; —generation (504), by the second processing unit, of a second pseudorandom binary string; —decryption of the message stored by applying an involutive transformation dependent on the second pseudorandom binary string, and by decrypting the header (505) of said message, by verifying the decrypted header (505), and as a function of the result of the verification, by decrypting the complete message (506); —verification (507) of the integrity of the decrypted message on the basis of its integrity check.
    Type: Grant
    Filed: September 5, 2014
    Date of Patent: August 15, 2017
    Assignee: SAGEM DEFENSE SECURITE
    Inventor: Christian Valpard
  • Patent number: 9513969
    Abstract: A method of managing execution of tasks by at least one processor unit of a computer system is provided, the processor unit operating in computation periods, and the method including the steps of associating time-related execution characteristics with each task, the time-related execution characteristics including a flag indicating the possibility of determining, a priori, a theoretical time for the end of the task in a nominal execution mode, and a flag indicating the possibility of an extended execution mode whereby execution can continue beyond the theoretical end-of-execution time. When a task is being executed at the theoretical end-of-execution time, an execution continuation algorithm is launched in the presence of the flag indicating the possibility of extended mode, or an error processing algorithm is launched in the absence of such a flag.
    Type: Grant
    Filed: May 14, 2013
    Date of Patent: December 6, 2016
    Assignee: SAGEM DEFENSE SECURITE
    Inventor: Christian Valpard
  • Publication number: 20160224469
    Abstract: The present invention relates to a method of transmitting a message comprising an integrity check and a header, between two processing units via a shared memory, comprising steps of: generation (501), by a first processing unit, of a first pseudorandom binary string;—encryption (502) of the message to be transmitted by applying an involutive transformation dependent on the first pseudorandom binary string generated;—transmission and storage (503) of the encrypted message in the shared memory;—generation (504), by the second processing unit, of a second pseudorandom binary string;—decryption of the message stored by applying an involutive transformation dependent on the second pseudorandom binary string, and by decrypting the header (505) of said message, by verifying the decrypted header (505), and as a function of the result of the verification, by decrypting the complete message (506);—verification (507) of the integrity of the decrypted message on the basis of its integrity check.
    Type: Application
    Filed: September 5, 2014
    Publication date: August 4, 2016
    Inventor: Christian Valpard
  • Patent number: 9405580
    Abstract: The present invention relates to the field of real-time executives and their adaptation for secure execution on a multicore processor. There is defined, in addition to the level of certification intrinsic to each task, a level of security relating to the criticality of the execution of the instance of the task in its context and by a method of sequencing distributed over the various cores which make it possible to exchange, during each time interval, the information relating to the level of certification and to the level of security of each of the tasks getting ready to be launched. A decision is then taken on each core for launching the task envisaged as a function of the relevant information received from the other cores.
    Type: Grant
    Filed: November 8, 2012
    Date of Patent: August 2, 2016
    Assignee: SAGEM DEFENSE SECURITE
    Inventor: Christian Valpard
  • Publication number: 20150169375
    Abstract: A method of managing execution of tasks by at least one processor unit of a computer system is provided, the processor unit operating in computation periods, and the method including the steps of associating time-related execution characteristics with each task, the time related execution characteristics including a flag indicating the possibility of determining, a priori, a theoretical time for the end of the task in a nominal execution mode, and a flag indicating the possibility of an extended execution mode whereby execution can continue beyond the theoretical end-of-execution time. When a task is being executed at the theoretical end-of-execution time, an execution continuation algorithm is launched in the presence of the flag indicating the possibility of extended mode, or an error processing algorithm is launched in the absence of such a flag.
    Type: Application
    Filed: May 14, 2013
    Publication date: June 18, 2015
    Applicant: SAGEM DEFENSE SECURITE
    Inventor: Christian Valpard
  • Publication number: 20140310823
    Abstract: The present invention relates to the field of real-time executives and their adaptation for secure execution on a multicore processor. There is defined, in addition to the level of certification intrinsic to each task, a level of security relating to the criticality of the execution of the instance of the task in its context and by a method of sequencing distributed over the various cores which make it possible to exchange, during each time interval, the information relating to the level of certification and to the level of security of each of the tasks getting ready to be launched. A decision is then taken on each core for launching the task envisaged as a function of the relevant information received from the other cores.
    Type: Application
    Filed: November 8, 2012
    Publication date: October 16, 2014
    Applicant: SAGEM DEFENSE SECURITE
    Inventor: Christian Valpard