Abstract: The invention relates to a method for performing an array built-in self-test (ABIST) on an electronic circuit (100), the electronic circuit (100) comprising a memory (110) with at least two memory arrays (111-115) and at least two array built-in self-test engines (116-120), wherein each automatic built-in self-test engine (116-120) is associated with a different memory array (111-115) and wherein each array built-in self-test engine (116-120) is associated with a programmable delay unit (DU1-DU5), the method comprising the following steps: determine at least one delay value (dn), the delay value (dn) corresponding to an array built-in self-test engine (116-120) and the delay value (dn) depending on the execution time (tdn) for testing the memory array (111-115) associated with the array built-in self-test engine (116-120); provide the at least one delay value (dn) to the programmable delay unit (DU1-DU5); and delay the start of the array built-in self-test engine (116-120) depending on the respective delay v