Abstract: A circuit and method for increasing the dynamic range of CMOS image sensors designed with a thin gate oxide layer. The circuit includes a high voltage supply circuit and a high voltage level shifter circuit. The high voltage supply circuit is configured to supply a voltage to the shifter circuit. The voltage has a voltage level higher than the maximum supply voltage of the associated fabrication process. The shifter circuit is configured to output a high reset signal based on a reset signal generated to reset a pixel circuit of a pixel array. Instead of the reset signal, the high reset signal is coupled to a gate of the reset transistor in the pixel circuit. The high reset signal allows the reset transistor to maintain a gate to source potential less than the maximum supply voltage even when the high reset signal is greater than the maximum supply voltage.

Abstract: A high voltage reset circuit with blooming control that increases the dynamic range of a CMOS image sensor and prevents blooming from occurring in output images. The circuit includes a high voltage supply circuit and a high voltage level shifter circuit. The high voltage supply circuit is configured to supply a voltage to the shifter circuit. The voltage has a voltage level higher than the absolute maximum voltage of the associated fabrication process. The shifter circuit is configured to output a high reset signal based on a reset signal generated to reset a pixel circuit of a pixel array. Instead of the reset signal, the high reset signal is coupled to a gate of the reset transistor in the pixel circuit. The high reset signal allows the reset transistor to maintain a gate to source potential less than the absolute maximum voltage even when the high reset signal is greater than the absolute maximum voltage.

Abstract: A method and apparatus for system offset calibration using an overranging ADC is provided. The overranging ADC is configured to convert an analog signal into an intermediary digital signal. The conversion range of the overranging ADC is extended beyond the full dynamic range of the ADC system. The intermediary digital signal has more bits than the digital output signal. A digital fine offset adjustment circuit is configured to provide the digital output signal by digitally subtracting a fine offset from the intermediary digital signal and decoding the intermediary digital signal. The digital output signal has approximately no offset, and has approximately no loss in dynamic range.

Abstract: An additional device is provided in parallel with one of the input devices of a differential pair. A fixed bias voltage, which is slightly less than the midpoint of the swing range of the input voltage to the differential pair, is applied to the gate of the added device. During the positive swing of the input, the added device remains off and does not effect performance. When the input voltage becomes lower than the fixed bias voltage, the added device turns on and conducts all current needed by the current source, leaving the differential input devices off, and eliminating impact ionization in the differential pair.