Patents by Inventor Christina R. Strong

Christina R. Strong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11887360
    Abstract: In one embodiment, an apparatus comprises a memory and a processor. The memory is to store sensor data captured by one or more sensors associated with a first device. Further, the processor comprises circuitry to: access the sensor data captured by the one or more sensors associated with the first device; determine that an incident occurred within a vicinity of the first device; identify a first collection of sensor data associated with the incident, wherein the first collection of sensor data is identified from the sensor data captured by the one or more sensors; preserve, on the memory, the first collection of sensor data associated with the incident; and notify one or more second devices of the incident, wherein the one or more second devices are located within the vicinity of the first device.
    Type: Grant
    Filed: October 8, 2021
    Date of Patent: January 30, 2024
    Assignee: Intel Corporation
    Inventors: Shao-Wen Yang, Eve M. Schooler, Maruti Gupta Hyde, Hassnaa Moustafa, Katalin Klara Bartfai-Walcott, Yen-Kuang Chen, Jessica McCarthy, Christina R. Strong, Arun Raghunath, Deepak S. Vembar
  • Patent number: 11714853
    Abstract: In one embodiment, an apparatus comprises a storage device and a processor. The storage device stores a feature vector index, wherein the feature vector index comprises a sparse-array data structure representing a feature space for a set of labeled feature vectors, wherein the set of labeled feature vectors are assigned to a plurality of classes. The processor is to: receive a query corresponding to a target feature vector; access, via the storage device, a first portion of the feature vector index, wherein the first portion of the feature vector index comprises a subset of labeled feature vectors that correspond to a same portion of the feature space as the target feature vector; determine the corresponding class of the target feature vector based on the subset of labeled feature vectors; and provide a response to the query based on the corresponding class.
    Type: Grant
    Filed: June 29, 2021
    Date of Patent: August 1, 2023
    Assignee: Intel Corporation
    Inventors: Luis Carlos Maria Remis, Vishakha Gupta, Christina R. Strong, Philip R. Lantz
  • Publication number: 20230114468
    Abstract: In one embodiment, an apparatus comprises a storage device and a processor. The storage device stores a plurality of images captured by a camera. The processor: accesses visual data associated with an image captured by the camera; determines a tile size parameter for partitioning the visual data into a plurality of tiles; partitions the visual data into the plurality of tiles based on the tile size parameter, wherein the plurality of tiles corresponds to a plurality of regions within the image; compresses the plurality of tiles into a plurality of compressed tiles, wherein each tile is compressed independently; generates a tile-based representation of the image, wherein the tile-based representation comprises an array of the plurality of compressed tiles; and stores the tile-based representation of the image on the storage device.
    Type: Application
    Filed: September 12, 2022
    Publication date: April 13, 2023
    Applicant: Intel Corporation
    Inventors: Christina R. Strong, Vishakha Gupta, Luis Carlos Maria Remis, Kushal Datta, Arun Raghunath
  • Patent number: 11450123
    Abstract: In one embodiment, an apparatus comprises a storage device and a processor. The storage device stores a plurality of images captured by a camera. The processor: accesses visual data associated with an image captured by the camera; determines a tile size parameter for partitioning the visual data into a plurality of tiles; partitions the visual data into the plurality of tiles based on the tile size parameter, wherein the plurality of tiles corresponds to a plurality of regions within the image; compresses the plurality of tiles into a plurality of compressed tiles, wherein each tile is compressed independently; generates a tile-based representation of the image, wherein the tile-based representation comprises an array of the plurality of compressed tiles; and stores the tile-based representation of the image on the storage device.
    Type: Grant
    Filed: July 13, 2021
    Date of Patent: September 20, 2022
    Assignee: Intel Corporation
    Inventors: Christina R. Strong, Vishakha Gupta, Luis Carlos Maria Remis, Kushal Datta, Arun Raghunath
  • Publication number: 20220223035
    Abstract: In one embodiment, an apparatus comprises a memory and a processor. The memory is to store sensor data captured by one or more sensors associated with a first device. Further, the processor comprises circuitry to: access the sensor data captured by the one or more sensors associated with the first device; determine that an incident occurred within a vicinity of the first device; identify a first collection of sensor data associated with the incident, wherein the first collection of sensor data is identified from the sensor data captured by the one or more sensors; preserve, on the memory, the first collection of sensor data associated with the incident; and notify one or more second devices of the incident, wherein the one or more second devices are located within the vicinity of the first device.
    Type: Application
    Filed: October 8, 2021
    Publication date: July 14, 2022
    Applicant: Intel Corporation
    Inventors: Shao-Wen Yang, Eve M. Schooler, Maruti Gupta Hyde, Hassnaa Moustafa, Katalin Klara Bartfai-Walcott, Yen-Kuang Chen, Jessica McCarthy, Christina R. Strong, Arun Raghunath, Deepak S. Vembar
  • Publication number: 20220180651
    Abstract: In one embodiment, an apparatus comprises a storage device and a processor. The storage device stores a plurality of images captured by a camera. The processor: accesses visual data associated with an image captured by the camera; determines a tile size parameter for partitioning the visual data into a plurality of tiles; partitions the visual data into the plurality of tiles based on the tile size parameter, wherein the plurality of tiles corresponds to a plurality of regions within the image; compresses the plurality of tiles into a plurality of compressed tiles, wherein each tile is compressed independently; generates a tile-based representation of the image, wherein the tile-based representation comprises an array of the plurality of compressed tiles; and stores the tile-based representation of the image on the storage device.
    Type: Application
    Filed: July 13, 2021
    Publication date: June 9, 2022
    Applicant: Intel Corporation
    Inventors: Christina R. Strong, Vishakha Gupta, Luis Carlos Maria Remis, Kushal Datta, Arun Raghunath
  • Publication number: 20220164384
    Abstract: In one embodiment, an apparatus comprises a storage device and a processor. The storage device stores a feature vector index, wherein the feature vector index comprises a sparse-array data structure representing a feature space for a set of labeled feature vectors, wherein the set of labeled feature vectors are assigned to a plurality of classes. The processor is to: receive a query corresponding to a target feature vector; access, via the storage device, a first portion of the feature vector index, wherein the first portion of the feature vector index comprises a subset of labeled feature vectors that correspond to a same portion of the feature space as the target feature vector; determine the corresponding class of the target feature vector based on the subset of labeled feature vectors; and provide a response to the query based on the corresponding class.
    Type: Application
    Filed: June 29, 2021
    Publication date: May 26, 2022
    Applicant: Intel Corporation
    Inventors: Luis Carlos Maria Remis, Vishakha Gupta, Christina R. Strong, Philip R. Lantz
  • Patent number: 11145201
    Abstract: In one embodiment, an apparatus comprises a memory and a processor. The memory is to store sensor data captured by one or more sensors associated with a first device. Further, the processor comprises circuitry to: access the sensor data captured by the one or more sensors associated with the first device; determine that an incident occurred within a vicinity of the first device; identify a first collection of sensor data associated with the incident, wherein the first collection of sensor data is identified from the sensor data captured by the one or more sensors; preserve, on the memory, the first collection of sensor data associated with the incident; and notify one or more second devices of the incident, wherein the one or more second devices are located within the vicinity of the first device.
    Type: Grant
    Filed: January 3, 2020
    Date of Patent: October 12, 2021
    Assignee: Intel Corporation
    Inventors: Shao-Wen Yang, Eve M. Schooler, Maruti Gupta Hyde, Hassnaa Moustafa, Katalin Klara Bartfai-Walcott, Yen-Kuang Chen, Jessica McCarthy, Christina R. Strong, Arun Raghunath, Deepak S. Vembar
  • Patent number: 11068757
    Abstract: In one embodiment, an apparatus comprises a storage device and a processor. The storage device stores a plurality of images captured by a camera. The processor: accesses visual data associated with an image captured by the camera; determines a tile size parameter for partitioning the visual data into a plurality of tiles; partitions the visual data into the plurality of tiles based on the tile size parameter, wherein the plurality of tiles corresponds to a plurality of regions within the image; compresses the plurality of tiles into a plurality of compressed tiles, wherein each tile is compressed independently; generates a tile-based representation of the image, wherein the tile-based representation comprises an array of the plurality of compressed tiles; and stores the tile-based representation of the image on the storage device.
    Type: Grant
    Filed: September 26, 2018
    Date of Patent: July 20, 2021
    Assignee: Intel Corporation
    Inventors: Christina R. Strong, Vishakha Gupta, Luis Carlos Maria Remis, Kushal Datta, Arun Raghunath
  • Patent number: 11055349
    Abstract: In one embodiment, an apparatus comprises a storage device and a processor. The storage device stores a feature vector index, wherein the feature vector index comprises a sparse-array data structure representing a feature space for a set of labeled feature vectors, wherein the set of labeled feature vectors are assigned to a plurality of classes. The processor is to: receive a query corresponding to a target feature vector; access, via the storage device, a first portion of the feature vector index, wherein the first portion of the feature vector index comprises a subset of labeled feature vectors that correspond to a same portion of the feature space as the target feature vector; determine the corresponding class of the target feature vector based on the subset of labeled feature vectors; and provide a response to the query based on the corresponding class.
    Type: Grant
    Filed: December 28, 2018
    Date of Patent: July 6, 2021
    Assignee: Intel Corporation
    Inventors: Luis Carlos Maria Remis, Vishakha Gupta, Christina R. Strong, Philip R. Lantz
  • Publication number: 20200357276
    Abstract: In one embodiment, an apparatus comprises a memory and a processor. The memory is to store sensor data captured by one or more sensors associated with a first device. Further, the processor comprises circuitry to: access the sensor data captured by the one or more sensors associated with the first device; determine that an incident occurred within a vicinity of the first device; identify a first collection of sensor data associated with the incident, wherein the first collection of sensor data is identified from the sensor data captured by the one or more sensors; preserve, on the memory, the first collection of sensor data associated with the incident; and notify one or more second devices of the incident, wherein the one or more second devices are located within the vicinity of the first device.
    Type: Application
    Filed: January 3, 2020
    Publication date: November 12, 2020
    Applicant: Intel Corporation
    Inventors: Shao-Wen Yang, Eve M. Schooler, Maruti Gupta Hyde, Hassnaa Moustafa, Katalin Klara Bartfai-Walcott, Yen-Kuang Chen, Jessica McCarthy, Christina R. Strong, Arun Raghunath, Deepak S. Vembar
  • Publication number: 20200250003
    Abstract: In one embodiment, an apparatus comprises a processor to: identify a workload comprising a plurality of tasks; generate a workload graph based on the workload, wherein the workload graph comprises information associated with the plurality of tasks; identify a device connectivity graph, wherein the device connectivity graph comprises device connectivity information associated with a plurality of processing devices; identify a privacy policy associated with the workload; identify privacy level information associated with the plurality of processing devices; identify a privacy constraint based on the privacy policy and the privacy level information; and determine a workload schedule, wherein the workload schedule comprises a mapping of the workload onto the plurality of processing devices, and wherein the workload schedule is determined based on the privacy constraint, the workload graph, and the device connectivity graph.
    Type: Application
    Filed: June 29, 2018
    Publication date: August 6, 2020
    Applicant: Intel Corporation
    Inventors: Shao-Wen Yang, Yen-Kuang Chen, Ragaad Mohammed Irsehid Altarawneh, Juan Pablo Munoz Chiabrando, Siew Wen Chin, Kushal Datta, Subramanya R. Dulloor, Julio C. Zamora Esquivel, Omar Ulises Florez Choque, Vishakha Gupta, Scott D. Hahn, Rameshkumar Illikkal, Nilesh Kumar Jain, Siti Khairuni Amalina Kamarol, Anil S. Keshavamurthy, Heng Kar Lau, Jonathan A. Lefman, Yiting Liao, Michael G. Millsap, Ibrahima J. Ndiour, Luis Carlos Maria Remis, Addicam V. Sanjay, Usman Sarwar, Eve M. Schooler, Ned M. Smith, Vallabhajosyula S. Somayazulu, Christina R. Strong, Omesh Tickoo, Srenivas Varadarajan, Jesús A. Cruz Vargas, Hassnaa Moustafa, Arun Raghunath, Katalin Klara Bartfai-Walcott, Maruti Gupta Hyde, Deepak S. Vembar, Jessica McCarthy
  • Patent number: 10559202
    Abstract: In one embodiment, an apparatus comprises a memory and a processor. The memory is to store sensor data captured by one or more sensors associated with a first device. Further, the processor comprises circuitry to: access the sensor data captured by the one or more sensors associated with the first device; determine that an incident occurred within a vicinity of the first device; identify a first collection of sensor data associated with the incident, wherein the first collection of sensor data is identified from the sensor data captured by the one or more sensors; preserve, on the memory, the first collection of sensor data associated with the incident; and notify one or more second devices of the incident, wherein the one or more second devices are located within the vicinity of the first device.
    Type: Grant
    Filed: June 8, 2018
    Date of Patent: February 11, 2020
    Assignee: Intel Corporation
    Inventors: Shao-Wen Yang, Eve M. Schooler, Maruti Gupta Hyde, Hassnaa Moustafa, Katalin Klara Bartfai-Walcott, Yen-Kuang Chen, Jessica McCarthy, Christina R. Strong, Arun Raghunath, Deepak S. Vembar
  • Publication number: 20190320022
    Abstract: In one embodiment, an apparatus comprises processing circuitry to: receive a request from an application to write an image to a data storage system, the request comprising one or more quality of service parameters indicating a level of service requested by the application; partition the image into a plurality of image parts; upload the plurality of image parts to the data storage system in parallel, wherein if the level of service requested by the application comprises low latency: a plurality of redundant copies of each image part is to be uploaded to the data storage system in parallel; and each image part that fails to upload within an upload timeout threshold is to be re-uploaded to the data storage system; receive an acknowledgment from the data storage system that each image part has been uploaded; and notify the application that the image has been written to the data storage system.
    Type: Application
    Filed: June 25, 2019
    Publication date: October 17, 2019
    Applicant: Intel Corporation
    Inventors: Arun Raghunath, Christina R. Strong
  • Publication number: 20190138554
    Abstract: In one embodiment, an apparatus comprises a storage device and a processor. The storage device stores a feature vector index, wherein the feature vector index comprises a sparse-array data structure representing a feature space for a set of labeled feature vectors, wherein the set of labeled feature vectors are assigned to a plurality of classes. The processor is to: receive a query corresponding to a target feature vector; access, via the storage device, a first portion of the feature vector index, wherein the first portion of the feature vector index comprises a subset of labeled feature vectors that correspond to a same portion of the feature space as the target feature vector; determine the corresponding class of the target feature vector based on the subset of labeled feature vectors; and provide a response to the query based on the corresponding class.
    Type: Application
    Filed: December 28, 2018
    Publication date: May 9, 2019
    Inventors: Luis Carlos Maria Remis, Vishakha Gupta, Christina R. Strong, Philip R. Lantz
  • Publication number: 20190043201
    Abstract: In one embodiment, an apparatus comprises a storage device and a processor. The storage device stores a plurality of images captured by a camera. The processor: accesses visual data associated with an image captured by the camera; determines a tile size parameter for partitioning the visual data into a plurality of tiles; partitions the visual data into the plurality of tiles based on the tile size parameter, wherein the plurality of tiles corresponds to a plurality of regions within the image; compresses the plurality of tiles into a plurality of compressed tiles, wherein each tile is compressed independently; generates a tile-based representation of the image, wherein the tile-based representation comprises an array of the plurality of compressed tiles; and stores the tile-based representation of the image on the storage device.
    Type: Application
    Filed: September 26, 2018
    Publication date: February 7, 2019
    Inventors: Christina R. Strong, Vishakha Gupta, Luis Carlos Maria Remis, Kushal Datta, Arun Raghunath
  • Publication number: 20190043351
    Abstract: In one embodiment, an apparatus comprises a memory and a processor. The memory is to store sensor data captured by one or more sensors associated with a first device. Further, the processor comprises circuitry to: access the sensor data captured by the one or more sensors associated with the first device; determine that an incident occurred within a vicinity of the first device; identify a first collection of sensor data associated with the incident, wherein the first collection of sensor data is identified from the sensor data captured by the one or more sensors; preserve, on the memory, the first collection of sensor data associated with the incident; and notify one or more second devices of the incident, wherein the one or more second devices are located within the vicinity of the first device.
    Type: Application
    Filed: June 8, 2018
    Publication date: February 7, 2019
    Inventors: Shao-Wen Yang, Eve M. Schooler, Maruti Gupta Hyde, Hassnaa Moustafa, Katalin Klara Bartfai-Walcott, Yen-Kuang Chen, Jessica McCarthy, Christina R, Strong, Arun Raghunath, Deepak S. Vembar