Patents by Inventor Christine Qiqing Ouyang
Christine Qiqing Ouyang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9099327Abstract: A multigate structure which comprises a semiconductor substrate; an ultra-thin silicon or carbon bodies of less than 20 nanometers thick located on the substrate; an electrolessly deposited metallic layer selectively located on the side surfaces and top surfaces of the ultra-thin silicon or carbon bodies and selectively located on top of the multigate structures to make electrical contact with the ultra-thin silicon or carbon bodies and to minimize parasitic resistance, and wherein the ultra-thin silicon or carbon bodies and metallic layer located thereon form source and drain regions is provided along with a process to fabricate the structure.Type: GrantFiled: August 7, 2012Date of Patent: August 4, 2015Assignee: International Business Machines CorporationInventors: Wilfried Haensch, Christian Lavoie, Christine Qiqing Ouyang, Xiaoyan Shao, Paul M. Solomon, Zhen Zhang, Bin Yang
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Patent number: 8936978Abstract: A multigate structure which comprises a semiconductor substrate; an ultra-thin silicon or carbon bodies of less than 20 nanometers thick located on the substrate; an electrolessly deposited metallic layer selectively located on the side surfaces and top surfaces of the ultra-thin silicon or carbon bodies and selectively located on top of the multigate structures to make electrical contact with the ultra-thin silicon or carbon bodies and to minimize parasitic resistance, and wherein the ultra-thin silicon or carbon bodies and metallic layer located thereon form source and drain regions is provided along with a process to fabricate the structure.Type: GrantFiled: November 29, 2010Date of Patent: January 20, 2015Assignee: International Business Machines CorporationInventors: Wilfried Haensch, Christian Lavoie, Christine Qiqing Ouyang, Xiaoyan Shao, Paul M. Solomon, Zhen Zhang, Bin Yang
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Patent number: 8410544Abstract: A method of fabricating and a structure of a merged multi-fin finFET. The method includes forming single-crystal silicon fins from the silicon layer of an SOI substrate having a very thin buried oxide layer and merging the end regions of the fins by growing vertical epitaxial silicon from the substrate and horizontal epitaxial silicon from ends of the fins such that vertical epitaxial silicon growth predominates.Type: GrantFiled: September 9, 2011Date of Patent: April 2, 2013Assignee: International Business Machines CorporationInventors: Kevin K. Chan, Thomas Safron Kanarsky, Jinghong Li, Christine Qiqing Ouyang, Dae-Gyu Park, Zhibin Ren, Xinhui Wang, Haizhou Yin
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Publication number: 20120298965Abstract: A multigate structure which comprises a semiconductor substrate; an ultra-thin silicon or carbon bodies of less than 20 nanometers thick located on the substrate; an electrolessly deposited metallic layer selectively located on the side surfaces and top surfaces of the ultra-thin silicon or carbon bodies and selectively located on top of the multigate structures to make electrical contact with the ultra-thin silicon or carbon bodies and to minimize parasitic resistance, and wherein the ultra-thin silicon or carbon bodies and metallic layer located thereon form source and drain regions is provided along with a process to fabricate the structure.Type: ApplicationFiled: August 7, 2012Publication date: November 29, 2012Applicants: GLOBALFOUNDRIES Inc., International Business Machines CorporationInventors: Wilfried Haensch, Christian Lavoie, Christine Qiqing Ouyang, Xiaoyan Shao, Paul M. Solomon, Zhen Zhang, Bin Yang
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Publication number: 20120132989Abstract: A multigate structure which comprises a semiconductor substrate; an ultra-thin silicon or carbon bodies of less than 20 nanometers thick located on the substrate; an electrolessly deposited metallic layer selectively located on the side surfaces and top surfaces of the ultra-thin silicon or carbon bodies and selectively located on top of the multigate structures to make electrical contact with the ultra-thin silicon or carbon bodies and to minimize parasitic resistance, and wherein the ultra-thin silicon or carbon bodies and metallic layer located thereon form source and drain regions is provided along with a process to fabricate the structure.Type: ApplicationFiled: November 29, 2010Publication date: May 31, 2012Applicants: GLOBALFOUNDRIES Inc., International Business Machines CorporationInventors: Wilfried Haensch, Christian Lavoie, Christine Qiqing Ouyang, Xiaoyan Shao, Paul M. Solomon, Zhen Zhang, Bin Yang
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Publication number: 20110316565Abstract: A Schottky junction silicon nanowire field-effect biosensor/molecule detector with a nanowire thickness of 10 nanometer or less and an aligned source/drain workfunction for increased sensitivity. The nanowire channel is coated with a surface treatment to which a molecule of interest absorbs, which modulates the conductivity of the channel between the Schottky junctions sufficiently to qualitatively and quantitatively measure the presence and amount of the molecule.Type: ApplicationFiled: June 29, 2010Publication date: December 29, 2011Applicant: International Business Machines Corp.Inventors: Dechao Guo, Christian Lavoie, Christine Qiqing Ouyang, Yanning Sun, Zhen Zhang
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Publication number: 20110316081Abstract: A method of fabricating and a structure of a merged multi-fin finFET. The method includes forming single-crystal silicon fins from the silicon layer of an SOI substrate having a very thin buried oxide layer and merging the end regions of the fins by growing vertical epitaxial silicon from the substrate and horizontal epitaxial silicon from ends of the fins such that vertical epitaxial silicon growth predominates.Type: ApplicationFiled: September 9, 2011Publication date: December 29, 2011Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Kevin K. Chan, Thomas Safron Kanarsky, Jinghong Li, Christine Qiqing Ouyang, Dae-Gyu Park, Zhibin Ren, Xinhui Wang, Haizhou Yin
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Patent number: 8043920Abstract: A method of fabricating and a structure of a merged multi-fin finFET. The method includes forming single-crystal silicon fins from the silicon layer of an SOI substrate having a very thin buried oxide layer and merging the end regions of the fins by growing vertical epitaxial silicon from the substrate and horizontal epitaxial silicon from ends of the fins such that vertical epitaxial silicon growth predominates.Type: GrantFiled: September 17, 2009Date of Patent: October 25, 2011Assignee: International Business Machines CorporationInventors: Kevin K. Chan, Thomas Safron Kanarsky, Jinghong Li, Christine Qiqing Ouyang, Dae-Gyu Park, Zhibin Ren, Xinhui Wang, Haizhou Yin
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Publication number: 20110062518Abstract: A method of fabricating and a structure of a merged multi-fin finFET. The method includes forming single-crystal silicon fins from the silicon layer of an SOI substrate having a very thin buried oxide layer and merging the end regions of the fins by growing vertical epitaxial silicon from the substrate and horizontal epitaxial silicon from ends of the fins such that vertical epitaxial silicon growth predominates.Type: ApplicationFiled: September 17, 2009Publication date: March 17, 2011Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Kevin K. Chan, Thomas Safron Kanarsky, Jinghong Li, Christine Qiqing Ouyang, Dae-Gyu Park, Zhibin Ren, Xinhui Wang, Haizhou Yin